参数资料
型号: DS1861B+
厂商: Maxim Integrated
文件页数: 13/25页
文件大小: 0K
描述: IC LASR CTRLR 1CHAN 5.5V 16CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 810
类型: 激光二极管控制器(光纤)
通道数: 1
电源电压: 2.85 V ~ 5.5 V
电流 - 电源: 5mA
工作温度: -40°C ~ 95°C
封装/外壳: 16-LBGA,CSPBGA
供应商设备封装: 16-CSBGA(4x4)
包装: 托盘
安装类型: 表面贴装
Full Laser Control with Fault Management
Reading the BIASSET and MODSET
Registers
The I BIASSET and I MODSET currents are generated by
embedded 18-bit and 12-bit DACs, respectively, and
their output currents can be read when the DS1861 has
been halted using the halt bit, and the password has
been entered. See the Detailed Register Descriptions
section for information on calculating the output current
from the register’s value.
1.500
1.125
0.750
0.375
Automatic Extinction Ratio Control
The DS1861 injects a small disturbance current to mea-
sure the gain (light/mA) of the laser driver and laser
diode pairing. This control methodology makes the
extinction ratio insensitive to changes in the photodi-
ode ’s responsivity due to temperature and aging
effects, as long as the ratio of the laser driver’s bias
current gain (A D ) and modulation current gain (A M )
remains constant (Figure 8).
The disturbance current is automatically scaled as the
BMD current-set point is adjusted, so the peak distur-
bance current always increases I BMD by approximately
3.3%. See Figure 9 for details.
To understand how the MODSET and BIASSET currents
control the extinction ratio, the extinction ratio equation
(extinction ratio = P1/P0) must first be expressed in
terms of the modulation power (P MOD ) and average
power (P AVG ). Figure 10 shows the current and power
levels that correspond to the optical logic 1 (P1) and
logic 0 (P0) levels.
Extinction Ratio = =
P AVG + P MOD
P AVG ? P MOD
0
0
64 128 192
APC REGISTER SETTING (DECIMAL)
255
P 1
P 0
1
2
1
2
Figure 7. BMD Current Setpoint vs. APC Register Setting
LASER DRIVER
BIASSET
I BIASSET
BIASREF
A D
BIAS
I BIAS
AC-COUPLING I D *
LASER
MODSET
I MODSET
MODREF
A M
MOD
I MOD
CIRCUITRY
DIODE
DS1861
*I D = I BIAS ± 1 I MOD
BMD
I BMD
PHOTO-
DIODE
LIGHT
2
Figure 8. AERC Block Diagram
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13
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