参数资料
型号: DS1861E+
厂商: Maxim Integrated
文件页数: 23/25页
文件大小: 0K
描述: IC LASR CTRLR 1CHAN 5.5V 14TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 96
类型: 激光二极管控制器(光纤)
通道数: 1
电源电压: 2.85 V ~ 5.5 V
电流 - 电源: 5mA
工作温度: -40°C ~ 95°C
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 管件
安装类型: 表面贴装
Full Laser Control with Fault Management
can result in a whole row being worn out over time by
writing a single byte repeatedly. Writing a row one byte
at a time will wear out the EEPROM eight times faster
than writing the entire row at once. The DS1861’s EEPROM
write cycles are specified in the Nonvolatile Memory
Characteristics table.
Reading a Single Byte from a Slave: Unlike the write
operation that uses the memory address byte to define
where the data is to be written, the read operation
occurs at the present value of the memory address
counter. To read a single byte from the slave at the
location currently in the address counter; the master
generates a start condition, writes the slave address
byte with R/ W = 1, reads the data byte with a NACK to
indicate the end of the transfer, and generates a stop
condition.
Manipulating the Address Counter for Reads: A
dummy write cycle can be used to force the address
COMMUNICATIONS KEY
counter to a particular value. To do this the master gen-
erates a start condition, writes the slave address byte
(R/ W = 0), writes the memory address where it desires
to read, generates a repeated start condition, writes the
slave address byte (R/ W = 1), reads data with ACK or
NACK as applicable, and generates a stop condition.
Figure 16 shows a read example using the repeated
start condition to specify the starting memory location.
Reading Multiple Bytes from a Slave: The read oper-
ation can be used to read multiple bytes with a single
transfer. When reading bytes from the slave, the master
simply ACKs the data byte if it desires to read another
byte before terminating the transaction. After the mas-
ter reads the last byte, it NACKs to indicate the end of
the transfer and generates a stop condition. This can
be done with or without modifying the address
counter’s location before the read cycle.
NOTES
S
P
START
STOP
A
N
ACK
NOT
ACK
WHITE BOXES INDICATED THE MASTER IS
CONTROLLING SDA
SHADED BOXES INDICATED THE SLAVE IS
CONTROLLING SDA
1) ALL BYTES ARE SENT MOST SIGNIFICANT BIT FIRST.
2) THE FIRST BYTE SENT AFTER A START CONDITION IS
ALWAYS THE SLAVE ADDRESS FOLLOWED BY THE
SR
REPEATED
START
X
X
X
X
X
X
X
X
8-BITS ADDRESS OR DATA
READ/WRITE BIT.
WRITE A SINGLE BYTE
S
1 0
1
0 A 2 A 1 A 0 0
A
MEMORY ADDRESS
A
DATA
A
P
WRITE UP TO AN 8-BYTE PAGE WITH A SINGLE TRANSACTION
S
1 0
1
0 A 2 A 1 A 0 0
A
MEMORY ADDRESS
A
DATA
A
DATA
A
P
READ A SINGLE BYTE WITH A DUMMY WRITE CYCLE TO SET THE ADDRESS COUNTER
S
1 0
1
0 A 2 A 1 A 0 0
A
MEMORY ADDRESS
A
SR
1 0
1
0 A 2 A 1 A 0 0
A
DATA
N
P
READ MULTIPLE BYTES WITH A DUMMY WRITE CYCLE TO SET THE ADDRESS COUNTER
S
1 0
1
0 A 2 A 1 A 0 0
A
MEMORY ADDRESS
A
SR
1 0
1
0 A 2 A 1 A 0 0
A
DATA
A
DATA
A
DATA
A
DATA
N
P
Figure 16. I 2 C Communications Examples
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