参数资料
型号: DS1874T+T&R
厂商: Maxim Integrated
文件页数: 20/88页
文件大小: 0K
描述: IC CTLR SFP+ ANLG LDD 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 激光二极管控制器
通道数: 1
电源电压: 2.85 V ~ 3.9 V
电流 - 电源: 2.5mA
工作温度: -40°C ~ 95°C
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 带卷 (TR)
安装类型: 表面贴装
其它名称: 90-1874T+TRL
SFP+ Controller with Digital LDD Interface
is either manually controlled or controlled using a tem-
DAC1/DAC2
3.24k Ω
3.24k Ω
0.01 μ F
OUTPUT
0.01 μ F
perature-indexed LUT. A delta-sigma is a digital output
using pulse-density modulation. It provides much lower
output ripple than a standard digital PWM output given
the same clock rate and filter components. Before t INIT ,
DS1874
Figure 9. Recommended RC Filter for DAC1/DAC2
0
1
2
3
4
5
6
7
the DAC1 and DAC2 outputs are high impedance.
The external RC filter components are chosen based
on ripple requirements, output load, delta-sigma fre-
quency, and desired response time. A recommended
filter is shown in Figure 9.
The DS1874’s delta-sigma outputs are 9 bits. For illus-
trative purposes, a 3-bit example is provided. Each
possible output of this 3-bit delta-sigma DAC is given in
Figure 10.
In LUT mode, DAC1 and DAC2 are each controlled by a
separate 8-bit, 4°C-resolution, temperature-addressed
LUT. The delta-sigma outputs use a 9-bit structure. The
8-bit LUTs are either loaded directly into the MSBs (8:1)
or the LSBs (7:0). This is determined by DAC1TI (Table
02h, Register C3h), DAC2TI (Table 02h, Register C4h),
DAC1TC (Table 02h, Register C6h, bit 6), and DAC2TC
(Table 02h, Register C6h, bit 5). See Figure 11 for more
details. The DAC1 LUT (Table 07h) and DAC2 LUT
(Table 08h) are nonvolatile and password-2 protected.
The reference input, REFIN, is the supply voltage for
the output buffer of DAC1 and DAC2. The voltage con-
nected to REFIN must be able to support the edge rate
requirements of the delta-sigma outputs. In a typical
application, a 0.1μF capacitor should be connected
between REFIN and ground.
Figure 10. Delta-Sigma Outputs
8
7
6
DAC[1/2]TI
DAC[1/2]TC = 0
8
7
6
DAC[1/2]TI
DAC[1/2]TC = 1
5
4
LUT LOADED TO [8:1]
(DAC BIT 0 = 0)
5
4
LUT LOADED TO [8:1]
(DAC BIT 0 = 0)
3
2
1
0
LUT LOADED TO [7:0]
3
2
1
0
LUT LOADED TO [7:0]
-40
TEMPERATURE ( ° C)
+102
-40
TEMPERATURE ( ° C)
+102
Figure 11. DAC1/DAC2 LUT Assignments
20
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