参数资料
型号: DS1876T+
厂商: Maxim Integrated Products
文件页数: 57/69页
文件大小: 0K
描述: IC CTRLR SFP DUAL LDD 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
类型: SFP 激光控制器
输入类型: 逻辑
输出类型: 逻辑
接口: I²C
电流 - 电源: 10mA
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 管件
60
Maxim Integrated
SFP Controller with Dual LDD Interface
DS1876
Table 02h, Register C6h: POLARITY
FACTORY DEFAULT
0Fh
READ ACCESS
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
WRITE ACCESS
PW2 or (PW1 and RWTBL2)
A2h AND B2h MEMORY
Common A2h and B2h memory location
MEMORY TYPE
Nonvolatile (SEE)
C6h
RESERVED
MOD2P
APC2P
MOD1P
APC1P
BIT 7
BIT 0
BITS 7:4
RESERVED
BIT 3
MOD2P: MOD2 DAC polarity. The MOD2 DAC (Table 02h, Registers C8h–C9h) range is
000h–3FFh. A setting of 000h creates a pulse-density of zero and 3FFh creates a pulse-density of
1023/1024. This polarity bit allows the user to use GND or VREFIN as the reference. The power-on
of MOD2 DAC is 000h; thus an application that needs VREFIN to be the off state should use the
inverted polarity.
0 = Normal polarity. A setting of 000h results in a pulse-density output of zero held at GND, and a
setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at VREFIN.
1 = Inverted polarity. A setting of 000h results in a pulse-density output of zero held at VREFIN, and
a setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at GND.
BIT 2
APC2P: APC2 DAC polarity. The APC2 DAC (Table 02h, Registers CAh–CBh) range is 000h–3FFh.
A setting of 000h creates a pulse-density of zero, and 3FFh creates a pulse-density of 1023/1024.
This polarity bit allows the user to use GND or VREFIN as the reference. The power-on of APC DAC
is 000h; thus an application that needs VREFIN to be the off state should use the inverted polarity.
0 = Normal polarity. A setting of 000h results in a pulse-density output of zero held at GND, and a
setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at VREFIN.
1 = Inverted polarity. A setting of 000h results in a pulse-density output of zero held at VREFIN, and
a setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at GND.
BIT 1
MOD1P: MOD1 DAC polarity. The MOD1 DAC (Table 02h, Registers CCh–CDh) range is
000h–3FFh. A setting of 000h creates a pulse-density of zero and 3FFh creates a pulse-density of
1023/1024. This polarity bit allows the user to use GND or VREFIN as the reference. The power-on
of MOD1 DAC is 000h; thus an application that needs VREFIN to be the off state should use the
inverted polarity.
0 = Normal polarity. A setting of 000h results in a pulse-density output of zero held at GND, and a
setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at VREFIN.
1 = Inverted polarity. A setting of 000h results in a pulse-density output of zero held at VREFIN, and
a setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at GND.
BIT 0
APC1P: APC1 DAC polarity. The APC1 DAC (Table 02h, Registers CEh–CFh) range is 000h–3FFh.
A setting of 000h creates a pulse-density of zero, and 3FFh creates a pulse-density of 1023/1024.
This polarity bit allows the user to use GND or VREFIN as the reference. The power-on of APC1
DAC is 000h; thus an application that needs VREFIN to be the off state should use the inverted
polarity.
0 = Normal polarity. A setting of 000h results in a pulse-density output of zero held at GND, and a
setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at VREFIN.
1 = Inverted polarity. A setting of 000h results in a pulse-density output of zero held at VREFIN, and
a setting of 3FFh results in a pulsed-density output of 1023/1024 held mostly at GND.
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