参数资料
型号: DS21352G
厂商: Maxim Integrated Products
文件页数: 96/137页
文件大小: 0K
描述: IC TXRX T1 1-CHIP 3.3V 100-BGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 240
功能: 单芯片收发器
接口: HDLC,T1
电路数: 1
电源电压: 3.14 V ~ 3.47 V
电流 - 电源: 75mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 100-LFBGA,CSPBGA
供应商设备封装: 100-CSBGA(10x10)
包装: 托盘
包括: DSX-1 和 CSU 线路补偿发生器,HDLC 控制器,带内回路代码发生器和检测器
DS21352/DS21552
61 of 137
TC1 TO TC24: TRANSMIT CHANNEL REGISTERS (Address=50 to 57 and 40
to 4F Hex)
(for brevity, only channel one is shown; see Table 5-1 for other register address)
(MSB)
(LSB)
C7
C6
C5
C4
C3
C2
C1
C0
TC1 (50)
SYMBOL
POSITION
NAME AND DESCRIPTION
C7
TC1.7
MSB of the Code (this bit is transmitted first)
C0
TC1.0
LSB of the Code (this bit is transmitted last)
TCC1/TCC2/TCC3: TRANSMIT CHANNEL CONTROL REGISTER (Address=16
to 18 Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TCC1 (16)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TCC2 (17)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TCC3 (18)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
TCC3.7
Transmit Channel 24 Code Insertion Control Bit
0=do not insert data from the TC24 register into the transmit data stream
1 = insert data from the TC24 register into the transmit data stream
CH1
TCC1.0
Transmit Channel 1 Code Insertion Control Bit
0=do not insert data from the TC1 register into the transmit data stream
1 = insert data from the TC1 register into the transmit data stream
11.2 RECEIVE SIDE CODE GENERATION
In the receive direction there are also two methods by which channel data to the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 11.2.1 was a
feature contained in the original DS2151 while the second method which is covered in Section 11.2.2 is a
new feature of the DS2152/352/552.
相关PDF资料
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DS2174QN+T&R IC BERT ENHANCED 44-PLCC
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