参数资料
型号: DS21352G
厂商: Maxim Integrated Products
文件页数: 97/137页
文件大小: 0K
描述: IC TXRX T1 1-CHIP 3.3V 100-BGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 240
功能: 单芯片收发器
接口: HDLC,T1
电路数: 1
电源电压: 3.14 V ~ 3.47 V
电流 - 电源: 75mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 100-LFBGA,CSPBGA
供应商设备封装: 100-CSBGA(10x10)
包装: 托盘
包括: DSX-1 和 CSU 线路补偿发生器,HDLC 控制器,带内回路代码发生器和检测器
DS21352/DS21552
62 of 137
11.2.1 FIXED PER-CHANNEL IDLE CODE INSERTION
The first method on the receive side involves using the Receive Mark Registers (RMR1/2/3) to determine
which of the 24 T1 channels should be overwritten with either a 7Fh idle code or with a digital milliwatt
pattern. The RCR2.7 bit will determine which code is used. The digital milliwatt code is an eight byte
repeating pattern that represents a 1 kHz sine wave (1E/0B/0B/1E/9E/8B/8B/9E). Each bit in the RMRs,
represents a particular channel. If a bit is set to a one, then the receive data in that channel will be
replaced with one of the two codes. If a bit is set to zero, no replacement occurs.
RMR1/RMR2/RMR3: RECEIVE MARK REGISTERS (Address=2D to 2F Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RMR1(2D)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RMR2(2E)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RMR3(2F)
SYMBOLS
POSITIONS
NAME AND DESCRIPTION
CH1-24
RMR1.0-3.7
Receive Channel Mark Control Bits
0 =do not affect the receive data associated with this channel
1 = replace the receive data associated with this channel with idle code or digital
milliwatt code (depends on the RCR2.7 bit)
11.2.2 UNIQUE PER-CHANNEL CODE INSERTION
The second method involves using the Receive Channel Control Registers (RCC1/2/3) to determine
which of the 24 T1 channels off of the T1 line and going to the backplane should be overwritten with the
code placed in the Receive Channel Registers (RC1 to RC24). This method is more flexible than the first
in that it allows a different 8–bit code to be placed into each of the 24 T1 channels.
RC1 TO RC24: RECEIVE CHANNEL REGISTERS (Address=80 to 8F and 58 to
5F Hex)
(for brevity, only channel one is shown; see Table 5-1 for other register address)
(MSB)
(LSB)
C7
C6
C5
C4
C3
C2
C1
C0
RC1 (80)
SYMBOL
POSITION
NAME AND DESCRIPTION
C7
RC1.7
MSB of the Code (this bit is sent first to the backplane)
C0
RC1.0
LSB of the Code (this bit is sent last to the backplane)
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