参数资料
型号: DS21458DK
厂商: Maxim Integrated Products
文件页数: 10/32页
文件大小: 0K
描述: KIT DESIGN FOR G511DS21458
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
设计资源: DS21458DK Gerber Files
标准包装: 1
主要目的: 电信,线路接口单元(LIU)
已用 IC / 零件: DS21458
已供物品: 板,子卡,CD
DS21458DK, Quad T1/E1/J1 Transceiver Design Kit Daughter Card
Register Name: SYNC2
Register Description: DS21458 TSSYNC Pin Source
Register Offset: 0x0016
Bit #
Name
Default
7
6
5
4
3
T4SRC
0
2
T3SRC
0
1
T2SRC
0
0
T1SRC
0
Bit 0: DS21458 Port 1 TSSYNC Source (T1SRC)
0 = Not using transmit-side elastic store, tri-state corresponding FPGA driver pin (weak pulldown)
1 = Drive TSSYNC 1 with RSYNC 1
Bit 1: DS21458 Port 2 TSSYNC Source (T2SRC)
0 = Not using transmit-side elastic store, tri-state corresponding FPGA driver pin (weak pulldown)
1 = Drive TSSYNC 2 with RSYNC 2
Bit 2: DS21458 Port 3 TSSYNC Source (T3SRC)
0 = Not using transmit-side elastic store, tri-state corresponding FPGA driver pin (weak pulldown)
1 = Drive TSSYNC 3 with RSYNC 3
Bit 3: DS21458 Port 4 TSSYNC Source (T4Source)
0 = Not using transmit-side elastic store, tri-state corresponding FPGA driver pin (weak pulldown)
1 = Drive TSSYNC 4 with RSYNC 4
Note: When driving TSSYNCx with RSYNCx the corresponding DS21458 port should be configured such that
RSYNCx is an output (IOCR1.4 = 0).
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