参数资料
型号: DS21FF42
厂商: Maxim Integrated Products
文件页数: 77/114页
文件大小: 0K
描述: IC FRAMER T1 4X4 16CH 300-BGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 40
控制器类型: T1 调帧器
接口: 并行/串行
电源电压: 2.97 V ~ 3.63 V
电流 - 电源: 300mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 300-BBGA
供应商设备封装: 300-PBGA(27x27)
包装: 管件
DS21FT42/DS21FF42
65 of 114
HDLC/BOC CONTROLLER REGISTER LIST Table 18-1
NAME
FUNCTION
HDLC Control Register (HCR)
general control over the HDLC and BOC
controllers
HDLC Status Register (HSR)
key status information for both transmit and
receive directions
HDLC Interrupt Mask Register (HIMR)
allows/stops status bits to/from causing an
interrupt
Receive HDLC Information Register (RHIR)
status information on receive HDLC controller
Receive BOC Register (RBOC)
status information on receive BOC controller
Receive HDLC FIFO Register (RHFR)
access to 64–byte HDLC FIFO in receive
direction
Receive HDLC DS0 Control Register 1 (RDC1)
Receive HDLC DS0 Control Register 2 (RDC2)
controls the HDLC function when used on DS0
channels
Transmit HDLC Information Register (THIR)
status information on transmit HDLC controller
Transmit BOC Register (TBOC)
enables/disables transmission of BOC codes
Transmit HDLC FIFO Register (THFR)
access to 64–byte HDLC FIFO in transmit
direction
Transmit HDLC DS0 Control Register 1 (TDC1)
Transmit HDLC DS0 Control Register 2 (TDC2)
controls the HDLC function when used on DS0
channels
19.1.2 Status Register for the HDLC
Four of the HDLC/BOC controller registers (HSR, RHIR, RBOC, and THIR) provide status information.
When a particular event has occurred (or is occurring), the appropriate bit in one of these four registers
will be set to a one. Some of the bits in these four HDLC status registers are latched and some are real
time bits that are not latched. Section 19.1.4 contains register descriptions that list which bits are latched
and which are not. With the latched bits, when an event occurs and a bit is set to a one, it will remain set
until the user reads that bit. The bit will be cleared when it is read and it will not be set again until the
event has occurred again. The real time bits report the current instantaneous conditions that are occurring
and the history of these bits is not latched.
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