参数资料
型号: DS21FT40N
厂商: DALLAS SEMICONDUCTOR
元件分类: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封装: BGA-300
文件页数: 20/87页
文件大小: 386K
代理商: DS21FT40N
DS21FT40
27 of 87
SYMBOLS
POSITION
NAME AND DESCRIPTION
RBCS
RCR2.2
Receive Side Backplane Clock Select.
0 = if RSYSCLK is 1.544 MHz
1 = if RSYSCLK is 2.048 MHz
RESE
RCR2.1
Receive Side Elastic Store Enable.
0 = elastic store is bypassed
1 = elastic store is enabled
RCR2.0
Not Assigned. Should be set to zero when written.
TCR1: TRANSMIT CONTROL REGISTER 1 (Address=12 Hex)
(MSB)
(LSB)
ODF
TFPT
T16S
TUA1
TSiS
TSA1
TSM
TSIO
SYMBOLS
POSITION
NAME AND DESCRIPTION
ODF
TCR1.7
Output Data Format.
0 = bipolar data at TPOS and TNEG
1 = NRZ data at TPOS; TNEG=0
TFPT
TCR1.6
Transmit Timeslot 0 Pass Through.
0 = FAS bits/Sa bits/Remote Alarm sourced internally from
the TAF and TNAF registers
1 = FAS bits/Sa bits/Remote Alarm sourced from TSER
T16S
TCR1.5
Transmit Timeslot 16 Data Select.
0 = sample timeslot 16 at TSER pin
1 = source timeslot 16 from TS0 to TS15 registers
TUA1
TCR1.4
Transmit Unframed All Ones.
0 = transmit data normally
1 = transmit an unframed all one’s code at TPOS and TNEG
TSiS
TCR1.3
Transmit International Bit Select.
0 = sample Si bits at TSER pin
1 = source Si bits from TAF and TNAF registers (in this
mode, TCR1.6 must be set to 0)
TSA1
TCR1.2
Transmit Signaling All Ones.
0 = normal operation
1 = force timeslot 16 in every frame to all ones
TSM
CR1.1
TSYNC Mode Select.
0 = frame mode (see the timing in Section 16)
1 = CAS and CRC4 multiframe mode (see the timing in
Section 16)
TSIO
TCR1.0
TSYNC I/O Select.
0 = TSYNC is an input
1 = TSYNC is an output
NOTE:
See Figure 16–15 for more details about how the Transmit Control Registers affect the operation of the
DS21FT40.
相关PDF资料
PDF描述
DS21FT40 DATACOM, FRAMER, PBGA300
DS21FT42 DATACOM, FRAMER, PBGA300
DS21FT42N DATACOM, FRAMER, PBGA300
DS21FF42 DATACOM, FRAMER, PBGA300
DS21FF42N DATACOM, FRAMER, PBGA300
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