参数资料
型号: DS21FT40N
厂商: DALLAS SEMICONDUCTOR
元件分类: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封装: BGA-300
文件页数: 39/87页
文件大小: 386K
代理商: DS21FT40N
DS21FT40
44 of 87
RDS0M: RECEIVE DS0 MONITOR REGISTER (Address = AB Hex)
(MSB)
(LSB)
B1
B2
B3
B4
B5
B6
B7
B8
SYMBOLS
POSITION
NAME AND DESCRIPTION
B1
RDS0M.7
Receive DS0 Channel Bit 1. MSB of the DS0 channel (first bit
to be received).
B2
RDS0M.6
Receive DS0 Channel Bit 2.
B3
RDS0M.5
Receive DS0 Channel Bit 3.
B4
RDS0M.4
Receive DS0 Channel Bit 4.
B5
RDS0M.3
Receive DS0 Channel Bit 5.
B6
RDS0M.2
Receive DS0 Channel Bit 6.
B7
RDS0M.1
Receive DS0 Channel Bit 7.
B8
RDS0M.0
Receive DS0 Channel Bit 8. LSB of the DS0 channel (last bit
to be received).
9. SIGNALING OPERATION
Each framer in the DS21FT40 contains provisions for both processor based (i.e., software based)
signaling bit access and for hardware based access. Both the processor based access and the hardware
based access can be used simultaneously if necessary.
The processor based signaling is covered in
Section 9.1 and the hardware based signaling is covered in Section 9.2.
9.1
PROCESSOR BASED SIGNALING
The Channel Associated Signaling (CAS) bits embedded in the E1 stream can be extracted from the
receive stream and inserted into the transmit stream by the framer. Each of the 30 voice channels has four
signaling bits (A/B/C/D) associated with it.
The numbers in parenthesis () are the voice channel
associated with a particular signaling bit. The voice channel numbers have been assigned as described in
the ITU documents. Please note that this is different than the channel numbering scheme (1 to 32) that is
used in the rest of the data sheet. For example, voice channel 1 is associated with timeslot 1 (Channel 2)
and voice Channel 30 is associated with timeslot 31 (Channel 32). There is a set of 16 registers for the
receive side (RS1 to RS16) and 16 registers on the transmit side (TS1 to TS16). The signaling registers
are detailed below.
相关PDF资料
PDF描述
DS21FT40 DATACOM, FRAMER, PBGA300
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