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参数资料
| 型号： | DS21Q42TN |
| 厂商： | DALLAS SEMICONDUCTOR |
| 元件分类： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PQFP128 |
| 封装： | TQFP-128 |
| 文件页数： | 52/119页 |
| 文件大小： | 1309K |
| 代理商： | DS21Q42TN |
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DS21Q42
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The user will always precede a read of any of the nine registers with a write. The byte written to the
register will inform the DS21Q42 which bits the user wishes to read and have cleared. The user will write
a byte to one of these registers, with a one in the bit positions he or she wishes to read and a zero in the
bit positions he or she does not wish to obtain the latest information on. When a one is written to a bit
location, the read register will be updated with the latest information. When a zero is written to a bit
position, the read register will not be updated and the previous value will be held. A write to the status
and information registers will be immediately followed by a read of the same register. The read result
should be logically AND’ed with the mask byte that was just written and this value should be written
back into the same register to insure that bit does indeed clear. This second write step is necessary
because the alarms and events in the status registers occur asynchronously in respect to their access via
the parallel port. This write–read– write scheme allows an external microcontroller or microprocessor to
individually poll certain bits without disturbing the other bits in the register. This operation is key in
controlling the DS21Q42 with higher–order software languages.
The SR1, SR2, and FDLS registers have the unique ability to initiate a hardware interrupt via the INT*
output pin. Each of the alarms and events in the SR1, SR2, and HSR can be either masked or unmasked
from the interrupt pin via the Interrupt Mask Register 1 (IMR1), Interrupt Mask Register 2 (IMR2), and
HDLC Interrupt Mask Register (HIMR) respectively. The FIMR register is covered in Section 15. The
INTERRUPT STATUS REGISTER can be used to determine which framer is requesting interrupt
servicing and the type of the request: status or the HDLC controller.
The interrupts caused by alarms in SR1 (namely RYEL, RCL, RBL, RLOS and LOTC) act differently
than the interrupts caused by events in SR1 and SR2 (namely LUP, LDN, RSLIP, RMF, TMF, SEC,
RFDL, TFDL, RMTCH, RAF, and RSC) and HIMR. The alarm caused interrupts will force the INT* pin
low whenever the alarm changes state (i.e., the alarm goes active or inactive according to the set/clear
criteria in Table 7-1). The INT* pin will be allowed to return high (if no other interrupts are present)
when the user reads the alarm bit that caused the interrupt to occur even if the alarm is still present.
The event caused interrupts will force the INT* pin low when the event occurs. The INT* pin will be
allowed to return high (if no other interrupts are present) when the user reads the event bit that caused the
interrupt to occur.
ISR: INTERRUPT STATUS REGISTER (Any address from A0H to FFH)
(MSB)
(LSB)
F3HDLC
F3SR
F2HDLC
F2SR
F1HDLC
F1SR
F0HDLC
F0SR
SYMBOL
POSITION
NAME AND DESCRIPTION
F3HDLC
ISR.7
FRAMER 3 HDLC CONTROLLER INTERRUPT
REQUEST.
0 = No interrupt request pending.
1 = Interrupt request pending.
F3SR
ISR.6
FRAMER 3 SR1 or SR2 INTERRUPT REQUEST.
0 = No interrupt request pending.
1 = Interrupt request pending.
F2HDLC
ISR.5
FRAMER 2 HDLC CONTROLLER INTERRUPT
REQUEST.
0 = No interrupt request pending.
1 = Interrupt request pending.
相关PDF资料 |
PDF描述 |
|---|---|
| DS21Q42T | DATACOM, FRAMER, PQFP128 |
| DS21Q43AT | DATACOM, FRAMER, PQFP128 |
| DS21Q44T | DATACOM, FRAMER, PQFP128 |
| DS21Q44TN | DATACOM, FRAMER, PQFP128 |
| DS21Q48N | DATACOM, PCM TRANSCEIVER, PBGA144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS21Q43A | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Quad E1 Framer |
| DS21Q43AT | 功能描述:网络控制器与处理器 IC Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q43AT+ | 功能描述:网络控制器与处理器 IC Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q43ATN | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Quad E1 Framer |
| DS21Q43-ATN | 功能描述:网络控制器与处理器 IC Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
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