参数资料
型号: DS21Q42TN
厂商: DALLAS SEMICONDUCTOR
元件分类: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PQFP128
封装: TQFP-128
文件页数: 88/119页
文件大小: 1309K
代理商: DS21Q42TN
DS21Q42
70 of 119
TDC1: TRANSMIT HDLC DS0 CONTROL REGISTER 1 (Address = 92 Hex)
(MSB)
(LSB)
TDS0E
-
TDS0M
TD4
TD3
TD2
TD1
TD0
SYMBOL
POSITION
NAME AND DESCRIPTION
TDS0E
TDC1.7
HDLC DS0 Enable.
0 = use transmit HDLC controller for the FDL.
1 = use transmit HDLC controller for one or more DS0 channels.
-
TDC1.6
Not Assigned. Should be set to 0.
TDS0M
TDC1.5
DS0 Selection Mode.
0 = utilize the TD0 to TD4 bits to select which single DS0
channel to use.
1 = utilize the TCHBLK control registers to select which DS0
channels to use.
TD4
TDC1.4
DS0 Channel Select Bit 4. MSB of the DS0 channel select.
TD3
TDC1.3
DS0 Channel Select Bit 3.
TD2
TDC1.2
DS0 Channel Select Bit 2.
TD1
TDC1.1
DS0 Channel Select Bit 1.
TD0
TDC1.0
DS0 Channel Select Bit 0. LSB of the DS0 channel select.
TDC2: TRANSMIT HDLC DS0 CONTROL REGISTER 2 (Address = 93 Hex)
(MSB)
(LSB)
TDB8
TDB7
TDB6
TDB5
TDB4
TDB3
TDB2
TDB1
SYMBOL
POSITION
NAME AND DESCRIPTION
TDB8
TDC2.7
DS0 Bit 8 Suppress Enable. MSB of the DS0. Set to one to stop
this bit from being used.
TDB7
TDC2.6
DS0 Bit 7 Suppress Enable. Set to one to stop this bit from
being used.
TDB6
TDC2.5
DS0 Bit 6 Suppress Enable. Set to one to stop this bit from
being used.
TDB5
TDC2.4
DS0 Bit 5 Suppress Enable. Set to one to stop this bit from
being used.
TDB4
TDC2.3
DS0 Bit 4 Suppress Enable. Set to one to stop this bit from
being used.
TDB3
TDC2.2
DS0 Bit 3 Suppress Enable. Set to one to stop this bit from
being used.
TDB2
TDC2.1
DS0 Bit 2 Suppress Enable. Set to one to stop this bit from
being used.
TDB1
TDC2.0
DS0 Bit 1 Suppress Enable. LSB of the DS0. Set to one to stop
this bit from being used.
相关PDF资料
PDF描述
DS21Q42T DATACOM, FRAMER, PQFP128
DS21Q43AT DATACOM, FRAMER, PQFP128
DS21Q44T DATACOM, FRAMER, PQFP128
DS21Q44TN DATACOM, FRAMER, PQFP128
DS21Q48N DATACOM, PCM TRANSCEIVER, PBGA144
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