- 您现在的位置：买卖IC网 > PDF目录1994 > DS2417X/T&R (Maxim Integrated Products)IC TIMECHIP W/INTRPT 1WIRE CSP PDF资料下载
参数资料
| 型号： | DS2417X/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 7/15页 |
| 文件大小： | 0K |
| 描述： | IC TIMECHIP W/INTRPT 1WIRE CSP |
| 标准包装： | 10,000 |
| 类型： | 二进制计数器 |
| 特点： | 唯一 ID |
| 时间格式： | 二进制 |
| 数据格式： | 二进制 |
| 接口： | 1 线 串行 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-XBGA，FCBGA |
| 供应商设备封装： | 6-覆晶（2.82x2.54） |
| 包装： | 带卷 (TR) |
DS2417
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. VPUP = external pullup voltage.
4. Input load is to ground.
5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1 s of this falling edge.
6. Under certain low voltage conditions VIL1MAX may have to be reduced to as much as 0.5V to always
guarantee a presence pulse.
7. The reset low time (tRSTL) should be restricted to a maximum of 960s, to allow interrupt signaling,
otherwise, it could mask or conceal interrupt pulses.
8. When VDD ramps up, the oscillator is always off.
9. At VDD = 3V ± 10%
10. At VDD = 5V ± 10%
11.
VIH1 has to be VDD – 0.3V or higher.
12. The optimal sampling point for the master is as close as possible to the end time of the 15μs tRDV
period without exceeding tRDV. For the case of a Read-One Time Slot, this maximizes the amount of
time for the pull-up resistor to recover to a high level. For a Read-Zero Time Slot, it ensures that a
read will occur before the fastest 1-Wire device(s) release the line.
13. The duration of the low pulse sent by the master should be a minimum of 1μs with a maximum value
as short as possible to allow time for the pull-up resistor to recover the line to a high level before the
1-Wire device samples in the case of a Write-One Time or before the master samples in the case of a
Read-One Time.
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
6 TSOC
D6+1
6 Flip Chip
BF611-2
15
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
2007 Maxim Integrated
The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.
相关PDF资料 |
PDF描述 |
|---|---|
| DS26502LN+ | IC T1/E1/J1 64KCC ELEMENT 64LQFP |
| DS26503LN+ | IC T1/E1/J1 BITS ELEMENT 64-LQFP |
| DS3105LN+ | IC TIMING LINE CARD 64-LQFP |
| DS3106LN+ | IC TIMING LINE CARD 64-LQFP |
| DS3231MZ+ | IC RTC I2C 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2421FP000 | 制造商:Thomas & Betts 功能描述:200A,CON,3P4W,MG,421,3P440V |
| DS2421FR000 | 制造商:Thomas & Betts 功能描述:200A,REC,3P4W,MG,421,3P440V |
| DS2421FRA00 | 制造商:Thomas & Betts 功能描述:200A,REC,3P4W,MG,421,AGL,3P440V |
| DS2421FRAB0 | 制造商:Thomas & Betts 功能描述:200A,REC,3P4W,MG,421,AB0,3P440V |
| DS2421FRABK | 制造商:Thomas & Betts 功能描述:200A,REC,3P4W,MG,421,ABK,3P440V |
发布紧急采购，3分钟左右您将得到回复。