参数资料
型号: DS2423P/T&R
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: Memory IC:Other
英文描述: SPECIALTY MEMORY CIRCUIT, PDSO6
封装: 3.70 X 4 MM, 1.50 MM HEIGHT, TSOC-6
文件页数: 14/25页
文件大小: 581K
代理商: DS2423P/T&R
DS2423
21 of 25
Read-Data Time Slot
RESISTOR
MASTER
DS2423
tREC
VPUP
VPUPMIN
VIHMIN
VILMAX
0V
Master
Sampling
Window
tLOWR
tSLOT
tSU
tRDV
tRELEASE
CRC GENERATION
With the DS2423 there are two different types of CRCs (Cyclic Redundancy Checks). One CRC is an 8-
bit type and is stored in the most significant byte of the 64-bit ROM. The bus master can compute a CRC
value from the first 56 bits of the 64-bit ROM and compare it to the value stored within the DS2423 to
determine if the ROM data has been received error-free by the bus master. The equivalent polynomial
function of this CRC is: X8 + X5 + X4 + 1. This 8-bit CRC is received in the true (non-inverted) form
when reading the ROM of the DS2423. It is computed at the factory and lasered into the ROM.
The other CRC is a 16-bit type, generated according to the standardized CRC16-polynomial function x16
+ x15 + x2 + 1. This CRC is used for error detection when reading Data Memory using the Read Memory
+ Counter command and for fast verification of a data transfer when writing to the scratchpad. It is the
same type of CRC as is used with NV RAM based iButtons for error detection within the iButton
Extended File Structure. In contrast to the 8-bit CRC, the 16-bit CRC is always returned or sent in the
complemented (inverted) form. A CRC-generator inside the DS2423 chip (Figure 12) will calculate a new
16-bit CRC as shown in the command flow chart of Figure 7. The bus master compares the CRC value
read from the device to the one it calculates from the data and decides whether to continue with an
operation or re-read the portion of the data with the CRC error.
With the initial pass through the Read Memory + Counter flow chart the 16-bit CRC value is the result of
shifting the command byte into the cleared CRC generator, followed by the two address bytes, data bytes,
value of the counter associated with the page and zero bits. Subsequent passes through the Read Memory
+ Counter flow chart will generate a 16-bit CRC that is the result of clearing the CRC generator and then
shifting in the data bytes, the value of the counter and the zero bits.
With the Write Scratchpad command the CRC is generated by first clearing the CRC generator and then
shifting in the command code, the Target Addresses TA1 and TA2 and all the data bytes. The DS2423
will transmit this CRC only if the data bytes written to the scratchpad include scratchpad ending offset
11111b. The data may start at any location within the scratchpad.
For more details on generating CRC values including example implementations in both hardware and
software, see Application Note 27.
iButton is a registered trademark of Dallas Semiconductor, a wholly owned subsidiary of Maxim Integrated Products Inc.
Not
Recommended
for
New
Design
相关PDF资料
PDF描述
DS2423P SPECIALTY MEMORY CIRCUIT, PDSO6
DS2423X SPECIALTY MEMORY CIRCUIT, UUC
DS2423 4K X 1 STANDARD SRAM, PDSO6
DS2422 1K X 1 STANDARD SRAM, PDSO6
DS2430AP 256 X 1 1-WIRE SERIAL EEPROM, PDSO6
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