参数资料
型号: DS2431Q+T&R
厂商: Maxim Integrated Products
文件页数: 16/27页
文件大小: 0K
描述: IC EEPROM 1KBIT 6TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1K(256 x 4)
接口: 1 线 串行
工作温度: -40°C ~ 85°C
封装/外壳: 6-WDFN 裸露焊盘
供应商设备封装: 6-TDFN 裸露焊盘(3x3)
包装: 带卷 (TR)
DS2431
1024-Bit, 1-Wire EEPROM
Resume [A5h]
To maximize the data throughput in a multidrop envi-
ronment, the Resume command is available. This com-
mand checks the status of the RC bit and, if it is set,
directly transfers control to the memory function com-
mands, similar to a Skip ROM command. The only way
to set the RC bit is through successfully executing the
Match ROM, Search ROM, or Overdrive-Match ROM
command. Once the RC bit is set, the device can
repeatedly be accessed through the Resume com-
mand. Accessing another device on the bus clears the
RC bit, preventing two or more devices from simultane-
ously responding to the Resume command.
Overdrive-Skip ROM [3Ch]
On a single-drop bus this command can save time by
allowing the bus master to access the memory func-
tions without providing the 64-bit ROM code. Unlike the
normal Skip ROM command, the Overdrive-Skip ROM
command sets the DS2431 into the overdrive mode
(OD = 1). All communication following this command
must occur at overdrive speed until a reset pulse of
minimum 480μs duration resets all devices on the bus
to standard speed (OD = 0).
When issued on a multidrop bus, this command sets all
overdrive-supporting devices into overdrive mode. To
subsequently address a specific overdrive-supporting
device, a reset pulse at overdrive speed must be
issued followed by a Match ROM or Search ROM com-
mand sequence. This speeds up the time for the
search process. If more than one slave supporting
overdrive is present on the bus and the Overdrive-Skip
ROM command is followed by a read command, data
collision occurs on the bus as multiple slaves transmit
simultaneously (open-drain pulldowns produce a wired-
AND result).
Overdrive-Match ROM [69h]
The Overdrive-Match ROM command followed by a 64-
bit ROM sequence transmitted at overdrive speed
allows the bus master to address a specific DS2431 on
a multidrop bus and to simultaneously set it in overdrive
mode. Only the DS2431 that exactly matches the 64-bit
ROM sequence responds to the subsequent memory
function command. Slaves already in overdrive mode
from a previous Overdrive-Skip ROM or successful
Overdrive-Match ROM command remain in overdrive
mode. All overdrive-capable slaves return to standard
speed at the next reset pulse of minimum 480μs dura-
tion. The Overdrive-Match ROM command can be used
with a single device or multiple devices on the bus.
16
1-Wire Signaling
The DS2431 requires strict protocols to ensure data
integrity. The protocol consists of four types of signal-
ing on one line: reset sequence with reset pulse and
presence pulse, write-zero, write-one, and read-data.
Except for the presence pulse, the bus master initiates
all falling edges. The DS2431 can communicate at two
different speeds: standard speed and overdrive speed.
If not explicitly set into the overdrive mode, the DS2431
communicates at standard speed. While in overdrive
mode, the fast timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line
needs to fall from V PUP below the threshold V TL . To get
from active to idle, the voltage needs to rise from
V ILMAX past the threshold V TH . The time it takes for the
voltage to make this rise is seen in Figure 10 as ε , and
its duration depends on the pullup resistor (R PUP ) used
and the capacitance of the 1-Wire network attached.
The voltage V ILMAX is relevant for the DS2431 when
determining a logical level, not triggering any events.
Figure 10 shows the initialization sequence required to
begin any communication with the DS2431. A reset
pulse followed by a presence pulse indicates that the
DS2431 is ready to receive data, given the correct ROM
and memory function command. If the bus master uses
slew-rate control on the falling edge, it must pull down
the line for t RSTL + t F to compensate for the edge. A
t RSTL duration of 480μs or longer exits the overdrive
mode, returning the device to standard speed. If the
DS2431 is in overdrive mode and t RSTL is no longer
than 80μs, the device remains in overdrive mode. If the
device is in overdrive mode and t RSTL is between 80μs
and 480μs, the device resets, but the communication
speed is undetermined.
After the bus master has released the line it goes into
receive mode. Now the 1-Wire bus is pulled to V PUP
through the pullup resistor or, in the case of a DS2482-
x00 or DS2480B driver, through the active circuitry.
When the threshold V TH is crossed, the DS2431 waits
for t PDH and then transmits a presence pulse by pulling
the line low for t PDL . To detect a presence pulse, the
master must test the logical state of the 1-Wire line at
t MSP .
The t RSTH window must be at least the sum of
t PDHMAX , t PDLMAX , and t RECMIN . Immediately after
t RSTH is expired, the DS2431 is ready for data commu-
nication. In a mixed population network, t RSTH should
be extended to minimum 480μs at standard speed and
48μs at overdrive speed to accommodate other 1-Wire
devices.
Maxim Integrated
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参数描述
DS2431QU 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1024-Bit, 1-Wire EEPROM
DS2431X 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
DS2431X+ 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
DS2431X+S 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1024-Bit, 1-Wire EEPROM
DS2431X+U 功能描述:电可擦除可编程只读存储器 1024-BIT 1-WIRE 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8