- 您现在的位置：买卖IC网 > PDF目录1915 > DS2482X-100+T (Maxim Integrated Products)IC MASTER I2C-1WIRE 1CH 9-WLP PDF资料下载
参数资料
| 型号： | DS2482X-100+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/24页 |
| 文件大小： | 0K |
| 描述： | IC MASTER I2C-1WIRE 1CH 9-WLP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 控制器类型： | I²C 总线控制器 |
| 接口： | I²C |
| 电源电压： | 2.9 V ~ 5.5 V |
| 电流 - 电源： | 750µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 9-WFBGA，WLBGA |
| 供应商设备封装： | 9-WLP |
| 包装： | 带卷 (TR) |
Single-Channel 1-Wire Master
I2C Definitions
The following terminology is commonly used to
describe I2C data transfers. The timing references are
defined in Figure 9.
Bus Idle or Not Busy: Both SDA and SCL are inac-
tive and in their logic-high states.
START Condition: To initiate communication with a
slave, the master must generate a START condition.
A START condition is defined as a change in state of
SDA from high to low while SCL remains high.
STOP Condition: To end communication with a
slave, the master must generate a STOP condition. A
STOP condition is defined as a change in state of
SDA from low to high while SCL remains high.
Repeated START Condition: Repeated STARTs are
commonly used for read accesses to select a spe-
cific data source or address to read from. The mas-
ter can use a repeated START condition at the end
of a data transfer to immediately initiate a new data
transfer following the current one. A repeated START
condition is generated the same way as a normal
START condition, but without leaving the bus idle
after a STOP condition.
Data Valid: With the exception of the START and
STOP condition, transitions of SDA can occur only
during the low state of SCL. The data on SDA must
remain valid and unchanged during the entire high
pulse of SCL plus the required setup and hold time
(tHD:DAT after the falling edge of SCL and tSU:DAT
before the rising edge of SCL; see Figure 9). There
is one clock pulse per bit of data. Data is shifted into
the receiving device during the rising edge of SCL.
When finished with writing, the master must release
the SDA line for a sufficient amount of setup time
(minimum tSU:DAT + tR in Figure 9) before the next
rising edge of SCL to start reading. The slave shifts
out each data bit on SDA at the falling edge of the
previous SCL pulse and the data bit is valid at the
rising edge of the current SCL pulse. The master
generates all SCL clock pulses, including those
needed to read from a slave.
Acknowledge: Typically a receiving device, when
addressed, is obliged to generate an acknowledge
after the receipt of each byte. The master must gen-
erate a clock pulse that is associated with this
acknowledge bit. A device that acknowledges must
pull SDA low during the acknowledge clock pulse in
such a way that SDA is stable low during the high
period of the acknowledge-related clock pulse plus
the required setup and hold time (tHD:DAT after the
falling edge of SCL and tSU:DAT before the rising
edge of SCL).
Not Acknowledged by Slave: A slave device may
be unable to receive or transmit data, for example,
because it is busy performing some real-time func-
tion. In this case, the slave device does not acknowl-
edge its slave address and leaves the SDA line high.
A slave device that is ready to communicate
acknowledges at least its slave address. However,
SCL
NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN).
SDA
STOP
START
REPEATED
START
SPIKE
SUPPRESSION
tBUF
tHD:STA
tHD:DAT
tSU:DAT
tSU:STO
tHD:STA
tSP
tSU:STA
tHIGH
tR
tF
tLOW
Figure 9. I2C Timing Diagram
DS2482-100
16
Maxim Integrated
相关PDF资料 |
PDF描述 |
|---|---|
| DS2482X-101+T | IC MASTER I2C-1WIRE 1CH 9-WLP |
| DS2483Q+T | IC I2C TO 1WIRE BRIDGE 8TDFN |
| DS2490Y | IC BRIDGE CLIP USB TO 1-W 24SOIC |
| DS26303LN-75+A3 | IC LIU E1/T1/J1 3.3V 144-ELQFP |
| DS26324GNA2+ | IC INTERFACE LINE 16CH 256-CSBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2482X-101+T | 功能描述:接口 - 专用 1-Wire Master w/ Sleep Mode RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| DS2482X-101+U | 功能描述:接口 - 专用 SNGL-CH 1-WIRE MASTER w/ SLP MODE RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| DS2483 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master with Adjustable Timing and Sleep Mode |
| DS2483Q+T | 功能描述:I2C 接口集成电路 Single-Channel 1-Wire Master RoHS:否 制造商:NXP Semiconductors 电源电压-最大:5.5 V 电源电压-最小:2.3 V 最大工作频率:400 KHz 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-16 |
| DS2483Q+U | 功能描述:I2C 接口集成电路 SINGLE-CH 1-WIRE MASTER RoHS:否 制造商:NXP Semiconductors 电源电压-最大:5.5 V 电源电压-最小:2.3 V 最大工作频率:400 KHz 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-16 |
发布紧急采购，3分钟左右您将得到回复。