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参数资料
型号： DS26303L-75+
厂商： Maxim Integrated Products
文件页数： 41/101页
文件大小： 0K
描述： IC LIU E1/T1/J1 3.3V 144-ELQFP
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 15
类型： 线路接口装置（LIU）
驱动器/接收器数： 8/8
规程： T1/E1/J1
电源电压： 3.135 V ~ 3.465 V
安装类型： 表面贴装
封装/外壳： 144-LQFP 裸露焊盘
供应商设备封装： 144-LQFP 裸露焊盘
包装： 托盘
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
44 of 101
Register Name:
LVDS
Register Description:
Line Violation Detect Status Register
Register Address:
12h
Bit #
7
6
5
4
3
2
1
0
Name
LVDS8
LVDS7
LVDS6
LVDS5
LVDS4
LVDS3
LVDS2
LVDS1
Default
0
Bits 7 to 0: Line Violation Detect Status n (LVDSn).
A bipolar violation, code violation, or excessive zeros cause
the associated LVDSn bit to latch. This bit is cleared on a read operationif GISC.CWE is reset. This bit is cleared
by a write operation to the bit if GISC.CWE is set. The LVDS register captures the first violation within a three-
clock-period window. If a second violation occurs after the first violation within the three-clock-period window, then
the second violation will not be latched even if a read to the LVDS register was performed. Excessive zeros need to
be enabled by the EZDE register for detection by this register. Code violations are only relative when in HDB3
mode and can be disabled for detection by this register by setting the CVDEB register. In dual-rail mode only
bipolar violations are relevant for this register.
Register Name:
RCLKI
Register Description:
Receive Clock Invert Register
Register Address:
13h
Bit #
7
6
5
4
3
2
1
0
Name
RCLKI8
RCLKI7
RCLKI6
RCLKI5
RCLKI4
RCLKI3
RCLKI2
RCLKI1
Default
0
Bits 7 to 0: Receive Clock Invert n (RCLKIn).
When this bit is set the RCLKn is inverted. This aligns
RPOSn/RNEGn on the falling edge of RCLKn. When reset, RPOSn/RNEGn is aligned on the rising edge of
RCLKn. Note that if the CLKE pin is high, the RPOSn/RNEGn is set on the falling edge of RCLKn regardless of the
settings in this register.
Register Name:
TCLKI
Register Description:
Transmit Clock Invert Register
Register Address:
14h
Bit #
7
6
5
4
3
2
1
0
Name
TCLKI8
TCLKI7
TCLKI6
TCLKI5
TCLKI4
TCLKI3
TCLKI2
TCLKI1
Default
0
Bits 7 to 0: Transmit Clock Invert n (TCLKIn).
When this bit is set the TCLKn is inverted. TPOSn/TNEGn should
be aligned on the rising edge of TCLKn. When reset, TPOSn/TNEGn should be aligned on the falling edge of
TCLKn.
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相关代理商/技术参数
参数描述
DS26303L-75+ 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray
DS26303L-75+A3 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray
DS26303L-75A3 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray
DS26303LN-120 功能描述:电信线路管理 IC RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray
DS26303LN-120+ 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray
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