参数资料
型号: DS26502LN+
厂商: Maxim Integrated Products
文件页数: 42/125页
文件大小: 0K
描述: IC T1/E1/J1 64KCC ELEMENT 64LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 160
类型: BITS 元件,多路复用器
PLL:
主要目的: T1/E1
输入: 时钟
输出: 时钟
电路数: 1
比率 - 输入:输出: 2:3
差分 - 输入:输出: 无/无
频率 - 最大: 6.312MHz
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
产品目录页面: 1430 (CN2011-ZH PDF)
DS26502 T1/E1/J1/64KCC BITS Element
23 of 125
5. PINOUT
Table 5-1. LQFP Pinout
MODE
PIN
TYPE
PARALLEL
PORT
SERIAL
PORT
HARDWARE
FUNCTION
1
I/O
AD2
SCLK
RSM
Parallel Port Mode: Address/Data Bus Bit 2
Serial Port Mode: Serial Clock
Hardware Mode: RS_8K Mode Select
2
I/O
AD3
TSM
Parallel Port Mode: Address/Data Bus Bit 3
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: TS_8K_4 Mode Select
3
I/O
AD4
RMODE0
Parallel Port Mode: Address/Data Bus Bit 4
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Receive Mode Select 0
4
I/O
AD5
RMODE1
Parallel Port Mode: Address/Data Bus Bit 5
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Receive Mode Select 1
5
I/O
AD6
TITD
Parallel Port Mode: Address/Data Bus Bit 6
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Transmit Internal Termination Disable
6
I/O
AD7
RITD
Parallel Port Mode: Address/Data Bus Bit 7
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Receive Internal Termination Disable
7, 24,
58
I
DVDD
Digital Positive Supply
8, 22,
56
I
DVSS
Digital Signal Ground
9
I
A0
E1TS
Parallel Port Mode: Address Bus Bit 0
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: E1 Internal Termination Select
10
I
A1
TAIS
Parallel Port Mode: Address Bus Bit 1
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Transmit AIS
11
I
A2
L0
Parallel Port Mode: Address Bus Bit 2
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Line Build-Out Select 0
12
I
A3
L1
Parallel Port Mode: Address Bus Bit 3
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Line Build-Out Select 1
13
I
A4
CPHA
L2
Parallel Port Mode: Address Bus Bit 4
Serial Port Mode: Serial Port Clock Phase Select
Hardware Mode: Line Build-Out Select 2
14
I
A5
CPOL
TMODE0
Parallel Port Mode: Address Bus Bit 5
Serial Port Mode: Serial Port Clock Polarity Select
Hardware Mode: Transmit Mode Select 0
15
I
A6
MPS0
Parallel Port Mode: Address Bus Bit 6
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: MCLK Pre-Scaler Select 0
16
I
ALE (AS)/A7
MPS1
Parallel Port Mode: Address Latch Enable/Address Bus
Bit 7
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: MCLK Pre-Scaler Select 1
17
I
TCLK
Transmit Clock Input
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