参数资料
型号: DS2705U+
厂商: Maxim Integrated Products
文件页数: 12/18页
文件大小: 0K
描述: IC AUTHENTICATE SHA-1 8-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
功能: 电池验证
电池化学: 所有电池类型
电源电压: 2.5 V ~ 5.5 V
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 管件
DS2705: SHA-1 Authentication Master
Table 5. Configuration Register
FIELD
NAME
DESCRIPTION
DEFAULT
Re-Tries Per Authentication Attempt
Each re-try includes:
OWR, PD, Skip ROM, Write Challenge, Read MAC, Compare MAC, Final OWR/PD
00
0 Re-try
(1 attempt per initiation)
CR[1:0]
RTA1:0
01
1 Re-tries (2 attempts per initiation)
00b
10
11
3 Re-tries (4 attempts per initiation)
7 Re-tries (8 attempts per initiation)
PASS output hi-Z until authentication complete.
Authentication complete after first occurrence of a PASS result or all re-tries are a FAIL result
Periodic Authentication Attempt
Each Attempt performed with the programmed number of re-tries:
0 0 No Periodic Attempts
CR[3:2]
PAA1:0
0 1 Attempt every 1s
1 0 Attempt every 8s
00b
1 1 Attempt every 16s
PASS and FAIL pins retain previous states until updated when authentication completed. If
presence not detected, status outputs are cleared to hi-Z.
Periodic Presence Test
1-Wire Presence test performed at programmed period:
0 0 No Periodic Test
CR[5:4]
PPT1:0
0 1 Attempt every 0.25s
1 0 Attempt every 0.5s
00b
1 1 Attempt every 1.0s
PASS and FAIL pins retain previous states if presence detected. PASS and FAIL pins are cleared to
hi-Z and status flags are cleared to zero if presence not detected.
Asynchronous Presence Authentication
CR[6]
APA
0 No
1 Yes
0b
Authentication sequence initiated t CHD ms delay after Presence Detect from token.
CHAL Pin Polarity Setting
CR[7]
CHP
0
High to low transition; active low
0b
1 Low to high transition; active high
FAIL Output Select
CR[8]
FOM
0
FAIL pin held low
0b
1
FAIL pin pulsed low at 2Hz 50% duty cycle
1-Wire Bus Speed
CR[9]
OWS
0
Standard 1-wire communication (Master and Slave)
0b
1 Overdrive 1-wire communication (Master and Slave)
EEPROM Lock
0 0 No Operation
0 1 No Operation
CR[11:10]
LOCK1:0
1 0 Permanently Lock EEPROM
00b
1 1 No Operation
Writing a 10b to the lock bits, followed by an EEPROM copy will permanently lock all EEPROM
locations inside the DS2705. Writing any other value to the lock bits will perform no operation.
CR[12]
CR[13]
CR[14]
CR[15]
?
FAILF
PASSF
LOCKF
RESERVED
FAIL flag. Mirrors the FAIL pin output for test via slave interface (SDQ pin). Set if authentication
attempt fails. Cleared when subsequent authentication attempt initiated.
PASS flag. Mirrors the PASS pin output for test via slave interface (SDQ pin). Set if authentication
attempt passes. Cleared when subsequent authentication attempt initiated.
Displays Lock/Unlock Status. LOCKF = 1 if lock procedure successful.
0b
0b
0b
0b
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