参数资料
型号: DS2705U+
厂商: Maxim Integrated Products
文件页数: 15/18页
文件大小: 0K
描述: IC AUTHENTICATE SHA-1 8-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
功能: 电池验证
电池化学: 所有电池类型
电源电压: 2.5 V ~ 5.5 V
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 管件
DS2705: SHA-1 Authentication Master
Write Data [6Ch, XX]. This command writes data starting at memory address XX. The LSb of the data to be stored
at address XX can be written immediately after the MSb of address has been entered. Because the address is
automatically incremented after the MSb of each byte is written, the LSb to be stored at address XX + 1 can be
written immediately after the MSb to be stored at address XX. If the bus master continues to write beyond address
FFh, the data starting at address 00 is overwritten. Writes to read-only addresses, reserved addresses and locked
EEPROM blocks are ignored. Incomplete bytes are not written. Write Data modifies the shadow RAM. A Copy Data
command is required to transfer data from the shadow to the EEPROM. See the Memory section for more details.
The Write command will cause spurious behavior if issued during an authentication attempt is in progress on the
MDQ pin.
Copy Data [48h]. This command copies the contents of all shadow RAM locations to EEPROM cells. After the
copy command is issued a high voltage pulse must be applied to the VPP pin for a time period of t PPW . See Figure 7
for example bus timing of an EEPROM program function. During the pulse, the bus master can issue read timeslots
on the bus. The DS2705 will respond with ‘0’s while the EEPROM copy is in progress, and ‘1’s after the copy is
complete. A reset on SDQ at any time during the copy sequence will prematurely terminate the operation.
Figure 7. Copy EEPROM Sequence
t PPR
VPP =
t PPW
14.5V MIN
t PPF
15.0V MAX
VPP = 0V
Non-critical Timing
1-Wire
Reset
SKIP ROM
Cmd
Copy Data
Cmd
Bus master may issue read slots during
EEPROM copy. DS2705 responds with
‘0’s during copy, ‘1’s afterwards.
Presence
Pulse
Recall Data [B8h]. This command recalls the contents of all EEPROM cell locations to the shadow RAM memory.
Following the Recall command, SDQ must be driven low for a minimum of t RSTL . SDQ can be driven low indefinitely
after the Recall command. The Recall command will cause spurious behavior if issued while an authentication
attempt is in progress on the MDQ pin.
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