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参数资料
型号： DS3253N+
厂商： Maxim Integrated Products
文件页数： 12/71页
文件大小： 0K
描述： IC LIU DS3/E3/STS-1 144-CSBGA
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 160
类型： 线路接口装置（LIU）
驱动器/接收器数： 3/3
规程： IEEE 1149.1
电源电压： 3.135 V ~ 3.465 V
安装类型： 表面贴装
封装/外壳： 144-BGA，CSPBGA
供应商设备封装： 144-TECSBGA（13x13）
包装： 托盘
DS3251/DS3252/DS3253/DS3254
2 of 71
TABLE OF CONTENTS
1.
STANDARDS COMPLIANCE ............................................................................................................6
2.
DETAILED DESCRIPTION ................................................................................................................7
3.
APPLICATION EXAMPLE .................................................................................................................7
4.
BLOCK DIAGRAMS ..........................................................................................................................8
5.
CONTROL INTERFACE MODES ......................................................................................................9
6.
PIN DESCRIPTIONS........................................................................................................................10
7.
REGISTER DESCRIPTIONS ...........................................................................................................15
8.
RECEIVER .......................................................................................................................................24
8.1
INTERFACING TO THE LINE........................................................................................................................... 24
8.2
OPTIONAL PREAMP ..................................................................................................................................... 24
8.3
AUTOMATIC GAIN CONTROL (AGC) AND ADAPTIVE EQUALIZER..................................................................... 24
8.4
CLOCK AND DATA RECOVERY (CDR)........................................................................................................... 24
8.5
LOSS-OF-SIGNAL (LOS) DETECTOR ............................................................................................................ 24
8.6
FRAMER INTERFACE FORMAT AND THE B3ZS/HDB3 DECODER .................................................................... 25
8.7
RECEIVE LINE-CODE VIOLATION COUNTER .................................................................................................. 26
8.8
RECEIVER POWER-DOWN ........................................................................................................................... 26
8.9
RECEIVER JITTER TOLERANCE .................................................................................................................... 26
9.
TRANSMITTER ................................................................................................................................27
9.1
TRANSMIT CLOCK ....................................................................................................................................... 27
9.2
FRAMER INTERFACE FORMAT AND THE B3ZS/HDB3 ENCODER .................................................................... 27
9.3
PATTERN GENERATION ............................................................................................................................... 27
9.4
WAVESHAPING, LINE BUILD-OUT, LINE DRIVER............................................................................................ 28
9.5
INTERFACING TO THE LINE........................................................................................................................... 28
9.6
TRANSMIT DRIVER MONITOR ....................................................................................................................... 28
9.7
TRANSMITTER POWER-DOWN...................................................................................................................... 28
9.8
TRANSMITTER JITTER GENERATION (INTRINSIC) ........................................................................................... 28
9.9
TRANSMITTER JITTER TRANSFER................................................................................................................. 28
10.
JITTER ATTENUATOR................................................................................................................32
11.
DIAGNOSTICS .............................................................................................................................34
11.1
PRBS GENERATOR AND DETECTOR............................................................................................................ 34
11.2
LOOPBACKS ............................................................................................................................................... 34
12.
CLOCK ADAPTER.......................................................................................................................35
13.
RESET LOGIC .............................................................................................................................35
14.
TRANSFORMERS........................................................................................................................36
15.
CPU INTERFACES ......................................................................................................................37
15.1
PARALLEL INTERFACE ................................................................................................................................. 37
15.2
SPI INTERFACE .......................................................................................................................................... 37
16.
JTAG TEST ACCESS PORT AND BOUNDARY SCAN .............................................................40
16.1
JTAG DESCRIPTION ................................................................................................................................... 40
16.2
JTAG TAP CONTROLLER STATE MACHINE DESCRIPTION............................................................................. 40
16.3
JTAG INSTRUCTION REGISTER AND INSTRUCTIONS...................................................................................... 42
16.4
JTAG TEST REGISTERS.............................................................................................................................. 43
17.
ELECTRICAL CHARACTERISTICS............................................................................................44
18.
PIN ASSIGNMENTS.....................................................................................................................56
19.
PACKAGE INFORMATION..........................................................................................................70
19.1
144-PIN TE-CSBGA (56-G6016-001) ....................................................................................................... 70
20.
THERMAL INFORMATION ..........................................................................................................71
21.
REVISION HISTORY....................................................................................................................71
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相关代理商/技术参数
参数描述
DS3253N# 功能描述:网络控制器与处理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS3253N+ 功能描述:网络控制器与处理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS3253NA3 制造商:Maxim Integrated Products 功能描述:DS3253 REV A3 - Rail/Tube
DS3254 功能描述:网络控制器与处理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS3254+ 功能描述:网络控制器与处理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
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