参数资料
| 型号： | DS32C35-33IND# |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/22页 |
| 文件大小： | 0K |
| 描述： | IC RTC W/TCXO 20-SOIC |
| 产品变化通告： | Product Discontinuation 28/Nov/2011 |
| 标准包装： | 37 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，FRAM，闰年，方波输出，TCXO/晶体 |
| 存储容量： | 8KB |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.7 V ~ 3.63 V |
| 电压 - 电源，电池： | 2.3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 管件 |
| 产品目录页面： | 1433 (CN2011-ZH PDF) |
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
14
____________________________________________________________________
Special-Purpose Registers
Control Register (0Eh)
Bit 7: Enable Oscillator (EOSC). When set to logic 0,
the oscillator is started. When set to logic 1, the oscilla-
tor is stopped when the device switches to VBAT. This
bit is clear (logic 0) when power is first applied. When
the device is powered by VCC, the oscillator is always
on regardless of the status of the EOSC bit.
Bit 6: Battery-Backed Square-Wave Enable
(BBSQW). When set to logic 1 with INTCN = 0 and
VCC <VPF, this bit enables the square wave. When
BBSQW is logic 0, the INT/SQW pin goes high imped-
ance when VCC <VPF. This bit is disabled (logic 0)
when power is first applied.
Bit 5: Convert Temperature (CONV). When the device
is in idle state, setting this bit to 1 forces the tempera-
ture sensor to convert the temperature into digital code
and execute the TCXO algorithm to update the capaci-
tance load for the oscillator. This can only happen
when a conversion is not already in progress. The user
should check the status bit BSY before forcing the con-
troller to start a new TCXO execution. A user-initiated
temperature conversion does not affect the internal 64-
second update cycle.
Bits 4 and 3: Rate Select (RS2 and RS1). These bits
control the frequency of the square-wave output when
the square wave has been enabled. Table 5 shows the
square-wave frequencies that can be selected with the
RS bits. These bits are both set to logic 1 (8.192kHz)
when power is first applied.
Bit 2: Interrupt Control (INTCN). This bit controls the
INT/SQW signal. When the INTCN bit is set to logic 0, a
square wave is output on the INT/SQW pin. When the
INTCN bit is set to logic 1, then a match between the
timekeeping registers and either of the alarm registers
activates the INT/SQW output (if the alarm is also
enabled). The corresponding alarm flag is always set
regardless of the state of the INTCN bit. The INTCN bit
is set to logic 1 when power is first applied.
Bit 1: Alarm 2 Interrupt Enable (A2IE). When set to
logic 1, this bit permits the alarm 2 flag (A2F) bit in the
status register to assert INT/SQW (when INTCN = 1).
When the A2IE bit is set to logic 0 or INTCN is set to
logic 0, the A2F bit does not initiate an interrupt signal.
The A2IE bit is disabled (logic 0) when power is first
applied.
Bit 0: Alarm 1 Interrupt Enable (A1IE). When set to
logic 1, this bit permits the alarm 1 flag (A1F) bit in the
status register to assert INT/SQW (when INTCN = 1).
When the A1IE bit is set to logic 0 or INTCN is set to
logic 0, the A1F bit does not initiate the INT/SQW sig-
nal. The A1IE bit is disabled (logic 0) when power is
first applied.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
EOSC
BBSQW
CONV
RS2
RS1
INTCN
A2IE
A1IE
INTCN
RS2
RS1
INT/SQW
OUTPUT
INTCN
A2IE
A1IE
0
1Hz
0
X
0
1
1.024kHz
0
X
0
1
0
4.096kHz
0
X
0
1
8.192kHz
0
X
1
X
A1F
1
0
1
X
A2F
1
0
1
X
A2F + A1F
1
Table 5. Interrupt/Square-Wave Output
Control Register (0Eh)
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| DS32C35-33IND# | 功能描述:实时时钟 w/Integrated TCXO/Crystal/FRAM RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS32EL0124 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:125 MHz . 312.5 MHz Deserializer with DDR LVDS Parallel Interface |
| DS32EL0124_0807 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:125 MHz . 312.5 MHz Deserializer with DDR LVDS Parallel Interface |
| DS32EL0124_09 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:125 MHz- 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface |
| DS32EL0124SQ | 制造商:NSC 制造商全称:National Semiconductor 功能描述:125 MHz- 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface |
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