参数资料
型号: DS80C400-FNY
厂商: Maxim Integrated Products
文件页数: 39/97页
文件大小: 0K
描述: IC MCU 75MHZ 16MB HP 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
产品变化通告: Product Discontinuation 20/Feb/2012
标准包装: 90
系列: 80C
核心处理器: 8051
芯体尺寸: 8-位
速度: 75MHz
连通性: 1 线,CAN,EBI/EMI,以太网,SIO,UART/USART
外围设备: 电源故障复位,WDT
输入/输出数: 64
程序存储器容量: 64KB(64K x 8)
程序存储器类型: ROM
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 1.62 V ~ 3.6 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 100-LQFP
包装: 托盘
配用: DS80C400-KIT#-ND - EVAL KIT FOR DS80C400
DS80C400 Network Microcontroller
44 of 97
Figure 1. Example External Memory Map—Merged Program/Data
Enhanced Quad Data Pointers
The DS80C400 offers enhanced features for accelerating the access and movement of data. It contains four data
pointers (DPTR0, DPTR1, DPTR2, and DPTR3), in comparison to the single data pointer offered on the original
8051, and allows the user to define, for each data pointer, whether the INC DPTR instruction increments or
decrements the selected pointer. Also, realizing that many data accesses occur in large contiguous blocks, the
DS80C400 can be configured to automatically increment or decrement a data pointer on execution of certain
instructions. This improvement greatly speeds access to consecutive pieces of data since hardware can now
accomplish a task (advancing the data pointer) that previously required software execution time. Finally, each pair
of data pointers (DPTR0, DPTR1 or DPTR2, DPTR3) can be configured for an auto-toggle mode. When placed into
this mode, certain data pointer-related instructions toggle the active data-pointer selection to the other pointer in the
pair. Enabling the auto-toggle feature, with one pointer to source data and a second pointer to destination data,
greatly speeds the copying of large data blocks.
DPTR0 is located at the same address as the original 8051 data pointer, allowing the DS80C400 to execute
standard 8051 code with no modifications. The registers making up the second, third, and fourth data pointers are
located at SFR address locations not used in the original 8051. To access the extended 24-bit address range
supported by the DS80C400, a third, high-order byte (DPXn) has been added to each pointer so that each data
pointer is now composed of the SFR combination DPXn+DPHn+DPLn. Table 8 summarizes the SFRs that make
up each data pointer.
CE0 =2M x 8
PCE0 = 1M x 8
PCE1 = 1M x 8
PCE2 = 1M x 8
PCE3 = 1M x 8
CE1 =2M x 8
CE7 = 2M x 8
CE6 = 2M x 8
CE5 = 2M x 8
CE4 = 2M x 8
CE3 = 2M x 8
CE2 =2M x 8
PROGRAM
MEMORY
DATA
MEMORY
NO
NAD
DRE
SS
ABL
E
CE0 = 2M x 8
PCE2 = 1M x 8
PCE3 = 1M x 8
CE1 = 2M x 8
CE7 = 2M x 8
CE6 = 2M x 8
CE5 = 2M x 8
CE4 = 2M x 8
CE3 = 2M x 8
CE2 = 2M x 8
PROGRAM
MEMORY
DATA
MEMORY
NO
NAD
DRE
SS
ABL
E
PROGRAM/
DATA
MEMORY
PDCE3 = 1
PDCE0 = 1
BEFORE
AFTER
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