参数资料
型号: DSP56F801EVM
厂商: Freescale Semiconductor
文件页数: 14/48页
文件大小: 0K
描述: KIT EVALUATION FOR DSP56F801
标准包装: 1
Flash Memory Characteristics
56F801 Technical Data, Rev. 17
Freescale Semiconductor
21
Table 3-7 Flash Timing Parameters
Operating Conditions: V
SS = VSSA = 0 V, VDD = VDDA = 3.0–3.6V, TA = –40° to +85°C, CL 50pF
Characteristic
Symbol
Min
Typ
Max
Unit
Figure
Program time
Tprog*
20
us
Erase time
Terase*
20
ms
Mass erase time
Tme*
100
ms
Endurance1
1.
One cycle is equal to an erase program and read.
ECYC
10,000
20,000
cycles
Data Retention1
DRET
10
30
years
The following parameters should only be used in the Manual Word Programming Mode
PROG/ERASE to NVSTR set
up time
Tnvs*
–5
us
NVSTR hold time
Tnvh*
–5
us
NVSTR hold time (mass erase)
Tnvh1*
–100
us
NVSTR to program set up time
Tpgs*
–10
us
Recovery time
Trcv*
–1
us
Cumulative program
HV period2
2.
Thv is the cumulative high voltage programming time to the same row before next erase. The same address cannot be
programmed twice before next erase.
Thv
–3
ms
Program hold time3
3.
Parameters are guaranteed by design in smart programming mode and must be one cycle or greater.
*The Flash interface unit provides registers for the control of these parameters.
Tpgh
––
Address/data set up time3
Tads
––
Address/data hold time3
Tadh
––
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