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| 型号： | DSP56F801EVM |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 16/48页 |
| 文件大小： | 0K |
| 描述： | KIT EVALUATION FOR DSP56F801 |
| 标准包装： | 1 |
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External Clock Operation
56F801 Technical Data, Rev. 17
Freescale Semiconductor
23
Figure 3-6 Flash Mass Erase Cycle
3.5 External Clock Operation
The 56F801 device clock is derived from either 1) an internal crystal oscillator circuit working in
conjunction with an external crystal, 2) an external frequency source, or 3) an on-chip relaxation oscillator.
To generate a reference frequency using the internal crystal oscillator circuit, a reference crystal external
these methods of clocking. Whichever type of clock derivation is used provides a reference signal to a
phase-locked loop (PLL) within the 56F801. In turn, the PLL generates a master reference frequency that
determines the speed at which chip operations occur.
Application code can be set to change the frequency source between the relaxation oscillator and crystal
oscillator or external source, and power down the relaxation oscillator if desired. Selection of which clock
is used is determined by setting the PRECS bit in the PLLCR (phase-locked loop control register) word
(bit 2). If the bit is set to 1, the external crystal oscillator circuit is selected. If the bit is set to 0, the internal
relaxation oscillator is selected, and this is the default value of the bit when power is first applied.
3.5.1
Crystal Oscillator
The internal oscillator is also designed to interface with a parallel-resonant crystal resonator in the
frequency range specified for the external crystal in Table 3-10. Figure 3-7 shows a recommended crystal
oscillator circuit. Follow the crystal supplier’s recommendations when selecting a crystal, since crystal
parameters determine the component values required to provide maximum stability and reliable start-up.
The crystal and associated components should be mounted as close as possible to the EXTAL and XTAL
pins to minimize output distortion and start-up stabilization time. The internal 56F80x oscillator circuitry
XADR
YE=SE=OE=0
ERASE
NVSTR
Tnvs
Tnvh1
Trcv
Tme
MAS1
IFREN
XE
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| DSP56F801EVMUM | 制造商:未知厂家 制造商全称:未知厂家 功能描述:56F801 Evaluation Module Hardware User＇s Manual |
| DSP56F801FA60 | 功能描述:数字信号处理器和控制器 - DSP, DSC 60Mhz/30MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| DSP56F801FA60E | 功能描述:数字信号处理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| DSP56F801FA60E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Pro |
| DSP56F801FA60E | 制造商:Freescale Semiconductor 功能描述:DIGITAL SIGNAL PROCESSORLQFP3.6V |
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