参数资料
型号: DSP56F801EVM
厂商: Freescale Semiconductor
文件页数: 23/48页
文件大小: 0K
描述: KIT EVALUATION FOR DSP56F801
标准包装: 1
56F801 Technical Data, Rev. 17
Freescale Semiconductor
3
Up to 30 MIPS operation at 60MHz core frequency
Up to 40 MIPS operation at 80MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
MCU-friendly instruction set supports both DSP and
controller functions: MAC, bit manipulation unit, 14
addressing modes
Hardware DO and REP loops
6-channel PWM Module
Two 4-channel, 12-bit ADCs
Serial Communications Interface (SCI)
Serial Peripheral Interface (SPI)
8K
× 16-bit words (16KB) Program Flash
1K
× 16-bit words (2KB) Program RAM
2K
× 16-bit words (4KB) Data Flash
1K
× 16-bit words (2KB) Data RAM
2K
× 16-bit words (4KB) Boot Flash
General Purpose Quad Timer
JTAG/OnCETM port for debugging
On-chip relaxation oscillator
11 shared GPIO
48-pin LQFP Package
56F801 General Description
56F801 Block Diagram
JTAG/
OnCE
Port
Digital Reg
Analog Reg
Low Voltage
Supervisor
Program Controller
and
Hardware Looping Unit
Data ALU
16 x 16 + 36
→ 36-Bit MAC
Three 16-bit Input Registers
Two 36-bit Accumulators
Address
Generation
Unit
Bit
Manipulation
Unit
PLL
Clock Gen
or Optional
Internal
Relaxation Osc.
16-Bit
56800
Core
PAB
PDB
XDB2
CGDB
XAB1
XAB2
GPIOB3/XTAL
GPIOB2/EXTAL
INTERRUPT
CONTROLS
IPBB
CONTROLS
IPBus Bridge
(IPBB)
MODULE CONTROLS
ADDRESS BUS [8:0]
DATA BUS [15:0]
COP RESET
RESET
IRQA
Applica-
tion-Specific
Memory &
Peripherals
Interrupt
Controller
Program Memory
8188 x 16 Flash
1024 x 16 SRAM
Boot Flash
2048 x 16 Flash
Data Memory
2048 x 16 Flash
1024 x 16 SRAM
COP/
Watchdog
SPI
or
GPIO
SCI0
or
GPIO
Quad Timer D
or GPIO
Quad Timer C
A/D1
A/D2
ADC
4
2
3
4
6
PWM Outputs
Fault Input
PWMA
16
VCAPC
VDD
VSS
VDDA
VSSA
6
24
5*
VREF
*includes TCS pin which is reserved for factory use and is tied to VSS
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