参数资料
型号: DSP56F805FV80
厂商: Freescale Semiconductor
文件页数: 4/56页
文件大小: 0K
描述: IC DSP 80MHZ 64KB FLASH 144LQFP
标准包装: 60
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: CAN,EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 71KB(35.5K x 16)
程序存储器类型: 闪存
RAM 容量: 2.5K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 144-LQFP
包装: 托盘
56F805 Technical Data, Rev. 16
12
Freescale Semiconductor
Table 2-7 Data Bus Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
16
D0–D15
Input/O
utput
Tri-stated
Data Bus— D0–D15 specify the data for external Program or
Data memory accesses. D0–D15 are tri-stated when the external
bus is inactive. Internal pullups may be active.
Table 2-8 Bus Control Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
PS
Output
Tri-stated
Program Memory Select—PS is asserted low for external
Program memory access.
1
DS
Output
Tri-stated
Data Memory Select—DS is asserted low for external Data
memory access.
1
WR
Output
Tri-stated
Write Enable—WR is asserted during external memory write
cycles. When WR is asserted low, pins D0–D15 become
outputs and the device puts data on the bus. When WR is
deasserted high, the external data is latched inside the
external device. When WR is asserted, it qualifies the A0–A15,
PS, and DS pins. WR can be connected directly to the WE pin
of a Static RAM.
1
RD
Output
Tri-stated
Read Enable—RD is asserted during external memory read
cycles. When RD is asserted low, pins D0–D15 become inputs
and an external device is enabled onto the device’s data bus.
When RD is deasserted high, the external data is latched
inside the device. When RD is asserted, it qualifies the
A0–A15, PS, and DS pins. RD can be connected directly to
the OE pin of a Static RAM or ROM.
相关PDF资料
PDF描述
DSP56F803BU80 IC DSP 80MHZ 64KB FLASH 100LQFP
MC68332ACFC25 IC MCU 32BIT 25MHZ 132-PQFP
MC68332ACFC20 IC MCU 32BIT 20MHZ 132-PQFP
MCF5307FT66B IC MPU 32BIT COLDF 66MHZ 208FQFP
MCF5206FT25A IC MCU 32BIT COLDF 25MHZ 160-QFP
相关代理商/技术参数
参数描述
DSP56F805FV80E 功能描述:数字信号处理器和控制器 - DSP, DSC 80Mhz/40MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:DSP LQFP144 3.6V
DSP56F805PB 制造商:未知厂家 制造商全称:未知厂家 功能描述:56F805 16-Bit Hybrid Controller Product Brief
DSP56F807 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:56F807 16-bit Hybrid Processor