参数资料
型号: DSP56F805FV80E
厂商: Freescale Semiconductor
文件页数: 5/56页
文件大小: 0K
描述: IC DSP 80MHZ 64KB FLASH 144LQFP
标准包装: 60
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: CAN,EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 71KB(35.5K x 16)
程序存储器类型: 闪存
RAM 容量: 2.5K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 144-LQFP
包装: 托盘
Interrupt and Program Control Signals
56F805 Technical Data, Rev. 16
Freescale Semiconductor
13
2.5 Interrupt and Program Control Signals
Table 2-9 Interrupt and Program Control Signals
No. of
Pins
Signal
Name
Signal
Type
State
During
Reset
Signal Description
1
IRQA
Input
(Schmitt)
Input
External Interrupt Request A—The IRQA input is a synchronized
external interrupt request indicating an external device is requesting
service. It can be programmed to be level-sensitive or
negative-edge-triggered.
1
IRQB
Input
(Schmitt)
Input
External Interrupt Request B—The IRQB input is an external
interrupt request indicating an external device is requesting service.
It can be programmed to be level-sensitive or
negative-edge-triggered.
1
RESET
Input
(Schmitt)
Input
Reset—This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed in
the Reset state. A Schmitt trigger input is used for noise immunity.
When the RESET pin is deasserted, the initial chip operating mode
is latched from the EXTBOOT pin. The internal reset signal will be
deasserted synchronous with the internal clocks, after a fixed
number of internal clocks.
To ensure complete hardware reset, RESET and TRST should be
asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and it is
necessary not to reset the OnCE/JTAG module. In this case, assert
RESET, but do not assert TRST.
1
RSTO
Output
Reset Output—This output reflects the internal reset state of the
chip.
1
EXTBOOT
Input
(Schmitt)
Input
External Boot—This input is tied to VDD to force device to boot
from off-chip memory. Otherwise, it is tied to VSS.
相关PDF资料
PDF描述
DSP56F807VF80E IC DSP 80MHZ 60K FLASH 160-BGA
DSP56F826BU80 IC DSP 80MHZ 64KB FLASH 100LQFP
DSP56F827FG80E IC HYBRID CTRLR 16BIT 128-LQFP
DSPB56362AG120 IC DSP 24BIT AUD 120MHZ 144-LQFP
DSPB56364AF100 IC DSP 24BIT AUD 100MHZ 100-LQFP
相关代理商/技术参数
参数描述
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:DSP LQFP144 3.6V
DSP56F805PB 制造商:未知厂家 制造商全称:未知厂家 功能描述:56F805 16-Bit Hybrid Controller Product Brief
DSP56F807 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:56F807 16-bit Hybrid Processor
DSP56F807EVM 功能描述:开发板和工具包 - 其他处理器 Evaluation Kit For DSP56F807 RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: