参数资料
型号: DSP56F805FV80E
厂商: Freescale Semiconductor
文件页数: 7/56页
文件大小: 0K
描述: IC DSP 80MHZ 64KB FLASH 144LQFP
标准包装: 60
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: CAN,EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 71KB(35.5K x 16)
程序存储器类型: 闪存
RAM 容量: 2.5K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 144-LQFP
包装: 托盘
Serial Peripheral Interface (SPI) Signals
56F805 Technical Data, Rev. 16
Freescale Semiconductor
15
2.8 Serial Peripheral Interface (SPI) Signals
Table 2-12 Serial Peripheral Interface (SPI) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
MISO
GPIOE6
Input/
Output
Input/
Output
Input
SPI Master In/Slave Out (MISO)—This serial data pin is an input to
a master device and an output from a slave device. The MISO line
of a slave device is placed in the high-impedance state if the slave
device is not selected.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
After reset, the default state is MISO.
1
MOSI
GPIOE5
Input/
Output
Input/
Output
Input
SPI Master Out/Slave In (MOSI)—This serial data pin is an output
from a master device and an input to a slave device. The master
device places data on the MOSI line a half-cycle before the clock
edge that the slave device uses to latch the data.
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is MOSI.
1
SCLK
GPIOE4
Input/
Output
Input/
Output
Input
SPI Serial Clock—In master mode, this pin serves as an output,
clocking slaved listeners. In slave mode, this pin serves as the data
clock input.
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SCLK.
1
SS
GPIOE7
Input
Input/
Output
Input
SPI Slave Select—In master mode, this pin is used to arbitrate
multiple masters. In slave mode, this pin is used to select the slave.
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SS.
相关PDF资料
PDF描述
DSP56F807VF80E IC DSP 80MHZ 60K FLASH 160-BGA
DSP56F826BU80 IC DSP 80MHZ 64KB FLASH 100LQFP
DSP56F827FG80E IC HYBRID CTRLR 16BIT 128-LQFP
DSPB56362AG120 IC DSP 24BIT AUD 120MHZ 144-LQFP
DSPB56364AF100 IC DSP 24BIT AUD 100MHZ 100-LQFP
相关代理商/技术参数
参数描述
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSP56F805FV80E 制造商:Freescale Semiconductor 功能描述:DSP LQFP144 3.6V
DSP56F805PB 制造商:未知厂家 制造商全称:未知厂家 功能描述:56F805 16-Bit Hybrid Controller Product Brief
DSP56F807 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:56F807 16-bit Hybrid Processor
DSP56F807EVM 功能描述:开发板和工具包 - 其他处理器 Evaluation Kit For DSP56F807 RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: