参数资料
| 型号： | ECLSOIC8EVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 2/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION HI FREQ 8-SOIC |
| 特色产品： | Evaluation Boards & Kits |
| 标准包装： | 1 |
| 主要目的： | 裸评估板 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | 8-SOIC 封装 |
| 主要属性： | 四层板，带分离式（双）电源 |
| 次要属性： | 可容纳几种不同的设计配置 |
| 已供物品： | 裸板 |
| 其它名称： | ECLSOIC8EVB-ND ECLSOIC8EVBOS |
ECLSOIC8EVB
LAY ? UP DETAIL
4 LAYER
SILKSCREEN (TOP SIDE)
LAYER 1 (TOP SIDE)
ROGERS 4003 0.008 in
LAYER 2 (GROUND AND VEE PLANE P1) 1 OZ
FR ? 4 0.020 in
LAYER 3 (GROUND AND VCC PLANE P2) 1 OZ
FR ? 4 0.025 in
LAYER 4 (BOTTOM SIDE)
Figure 2. Evaluation Board Lay ? up
0.062 $ 0.007
Board Layout
The 8 ? lead SOIC evaluation board was designed to be
versatile and accommodate several different configurations.
The input, output, and power pin layout of the evaluation
board is shown in Figure 3. The evaluation board has at least
eleven possible configurable options. Table 1. list the
Top View
devices and the relevant configuration that utilizes this PCB
board. List of components and simple schematics are located
in Figures 4 through 14. Place SMA connectors on J1
through J7, 50 W chip resistors on R1 through R7, and chip
capacitors C1 through C4 according to configuration
figures. (C1 and C2 are 0.01 m F and C3 and C4 are 0.1 m F).
Bottom View
Figure 3. Evaluation Board Layout
http://onsemi.com
2
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