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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
EDI88130CS
AC CHARACTERISTICS – READ CYCLE (15 to 20ns)
(VCC = 5.0V, VSS = 0V, TA = -55
°C to +125°C)
Symbol
15ns*
17ns
20ns
Parameter
JEDEC
Alt.
Min
Max
Min
Max
Min
Max
Units
Read Cycle Time
tAVAV
tRC
15
17
20
ns
Address Access Time
tAVQV
tAA
15
17
20
ns
Chip Enable Access Time
tE1LQV
tACS
15
17
20
ns
tE2HQV
tACS
15
17
20
ns
Chip Enable to Output in Low Z (1)
tE1LQX
tCLZ
55
5
ns
tE2HQX
tCLZ
55
5
ns
Chip Disable to Output in Low Z (1)
tE1HQZ
tCHZ
67
8
ns
tE2LQZ
tCHZ
67
8
ns
Output Hold from Address Change
tAVQX
tOH
33
3
ns
Output Enable to Output Valid
tGLQV
tOE
66
7
ns
Output Enable to Output in Low Z (1)
tGLQX
tOLZ
00
0
ns
Output Disable to Output in High Z(1)
tGHQZ
tOHZ
56
8
ns
Chip Enable to Power Up (1)
tE1LICCH
tPU
00
0
ns
tE2HICCH
tPU
00
0
ns
Chip Enable to Power Down (1)
tE1HICCL
tPD
15
17
20
ns
tE2LICCL
tPD
15
17
20
ns
1. This parameter is guaranteed by design but not tested.
* 15ns access time is advanced information, contact factory for availability.
AC CHARACTERISTICS – READ CYCLE (25 to 55ns)
(VCC = 5.0V, VSS = 0V, TA = -55
°C to +125°C)
Symbol
25ns
35ns
45ns
55ns
Parameter
JEDEC
Alt.
Min
Max
Min
Max
Min
Max
Min
Max
Units
Read Cycle Time
tAVAV
tRC
25
35
45
55
ns
Address Access Time
tAVQV
tAA
25
35
45
55
ns
Chip Enable Access Time
tE1LQV
tACS
25
35
45
55
ns
Chip Enable Access Time
tE2HQV
tACS
25
35
45
55
ns
Chip Enable to Output in Low Z (1)
tE1LQX
tCLZ
5555
ns
tE2HQX
tCLZ
5555
ns
Chip Disable to Output in Low Z (1)
tE1HQZ
tCHZ
10
15
20
ns
tE2LQZ
tCHZ
10
15
20
ns
Output Hold from Address Change
tAVQX
tOH
0000
ns
Output Enable to Output Valid
tGLQV
tOE
10
15
20
25
ns
Output Enable to Output in Low Z (1)
tGLQX
tOLZ
0000
ns
Output Disable to Output in High Z(1)
tGHQZ
tOHZ
10
15
20
ns
Chip Enable to Power Up (1)
tE1LICCH
tPU
0000
ns
tE2HICCH
tPU
0000
ns
Chip Enable to Power Down (1)
tE1HICCL
tPD
25
35
45
55
ns
tE2LICCL
tPD
25
35
45
55
ns
1. This parameter is guaranteed by design but not tested.