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参数资料
| 型号： | EDI8L21665V |
| 英文描述： | 2x64Kx16 SRAM(2x64Kx16静态RAM) |
| 中文描述： | 2x64Kx16的SRAM（静态RAM的2x64Kx16） |
| 文件页数： | 2/5页 |
| 文件大小： | 138K |
| 代理商： | EDI8L21665V |
2
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI8L21665V
RECOMMENDED OPERATING CONDITIONS
Description
Symbol
Min
Max
Unit
Input High Voltage
VIH
2.2
Vcc+0.5
V
Input Low Voltage
VIL
-0.3
0.8
V
Supply Voltage
Vcc
3.0
3.6
V
CAPACITANCE
(f = 1MHz, VIN = VCC or VSS)
Voltage on Vcc Supply Relative to Vss
-0.5V to 4.6V
VIN
-0.5V to Vcc+0.5V
Storage Temperature
-55
°C to +125°C
Junction Temperature
+125
°C
Power Dissipation
3 Watts
Short Circuit Output Current (per I/O)
50 mA
* Stress greater than those listed under "Absolute Maximum Ratings" may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions greater than those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
Parameter
Symbol
Max
Unit
Address Lines
CA
8
pF
Data Lines
CD/Q
17
pF
Control Lines
CC
15
pF
PIN DESCRIPTIONS
Pin
Symbol
Type
Description
A0-14
Input
Addresses
A15A
Input
Addresses: A15 on Bank ‘A’ of memory
A15B
Input
Addresses: A15 on Bank ‘B’ of memory
W
Input
Write Enable: This active LOW input allows a full 16-bit WRITE to occur.
CE1
Input
Chip Enable: This active LOW input is used to enable the ‘A’ Bank of the device.
CE2
Input
Chip Enable: This active LOW input is used to enable the ‘B’ Bank of the device.
G
Input
Output Enable: This active LOW asynchronous input enables the data output drivers.
Various
DQ0-15
Input/Output
Data Inputs/Outputs
Various
Vcc
Supply
Core power supply: +3.3V -5%/+10%
Various
Vss
Ground
E
Input
Enable, This active LOW input controls Write and Read Timing
DC ELECTRICAL CHARACTERISTICS
(f = 1MHz, VIN = VCC or Vss)
Parameter
Symbol
Conditions
Min
Max
Units
Device Selected; all inputs
≤ VIL or ≥ VIH;
-10ns
380
mA
Power Supply Current: Operating
ICC1
cycle time
≥ tKC MIN;
-12ns
360
VCC = MAX; outputs open
-15ns
260
Device deselected; VCC = MAX;
CMOS Standby
ISB2
all inputs
≤ VSS +0.2 or ≥ VCC -0.2; all inputs static;
60
mA
CLK frequency = 0
TTL Standby
ISB3
Device deselected; all inputs
≤ VIL or ≥ VIH;
120
mA
all inputs static; VCC = MAX; CLK frequency = 0
Input Leakage Current
ILI
0V
≤ VIN ≤ VCC
-5
5
A
Output Leakage Current
ILO
Output(s) disabled, 0V
≤ VOUT ≤ VCC
-5
5
A
Output High Voltage
VOH
IOH = -4.0mA
2.4
V
Output Low Voltage
VOL
IOL = 8.0mA
0.4
V
ABSOLUTE MAXIMUM RATINGS*
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