参数资料
型号: EFM32TG232F32
厂商: Energy Micro
文件页数: 50/136页
文件大小: 0K
描述: IC MCU 32BIT 32KB FLASH 64LQFP
特色产品: EFM32 Tiny Gecko
标准包装: 1
系列: Tiny Gecko
核心处理器: ARM? Cortex?-M3
芯体尺寸: 32-位
速度: 32MHz
连通性: I²C,IrDA,智能卡,SPI,UART/USART
外围设备: 欠压检测/复位,DMA,I²S,POR,PWM,WDT
输入/输出数: 53
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 4K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 3.8 V
数据转换器: A/D 8x12b,D/A 1x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 64-TQFP
包装: 标准包装
其它名称: 914-1030-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
20
www.energymicro.com
Bits[31:1] of the alias word have no effect on the bit-band bit. Writing 0x01 has the same effect as writing
0xFF
. Writing 0x00 has the same effect as writing 0x0E.
Reading a word in the alias region:
0x00000000 indicates that the targeted bit in the bit-band region is set to zero
0x00000001 indicates that the targeted bit in the bit-band region is set to 1
2.2.5.2 Directly accessing a bit-band region
Section 2.2.3 (p. 16) describes the behavior of direct byte, halfword, or word accesses to the bit-
band regions.
2.2.6 Memory endianness
The processor views memory as a linear collection of bytes numbered in ascending order from
zero. For example, bytes 0-3 hold the first stored word, and bytes 4-7 hold the second stored word.
Section 2.2.6.1 (p. 20) describes how words of data are stored in memory.
2.2.6.1 Little-endian format
The EFM32 uses a little-endian format, in which the processor stores the least significant byte of a word
at the lowest-numbered byte, and the most significant byte at the highest-numbered byte. For example:
Mem ory
Regist er
Address A
A+ 1
lsbyt e
m sbyt e
A+ 2
A+ 3
0
7
B0
B1
B3
B2
31
2423
1615
8 7
0
B0
B1
B2
B3
2.2.7 Synchronization primitives
The Cortex-M3 instruction set includes pairs of synchronization primitives. These provide a non-blocking
mechanism that a thread or process can use to obtain exclusive access to a memory location. Software
can use them to perform a guaranteed read-modify-write memory update sequence, or for a semaphore
mechanism.
A pair of synchronization primitives comprises:
A Load-Exclusive instruction
Used to read the value of a memory location, requesting exclusive
access to that location.
A Store-Exclusive instruction
Used to attempt to write to the same memory location, returning a
status bit to a register. If this bit is:
0
it indicates that the thread or process gained exclusive access to
the memory, and the write succeeds,
1
it indicates that the thread or process did not gain exclusive
access to the memory, and no write is performed,
The pairs of Load-Exclusive and Store-Exclusive instructions are:
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