参数资料
| 型号： | EL5126CLZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 2/12页 |
| 文件大小： | 0K |
| 描述： | IC VOLTAGE GEN 8CH TFT-LCD 32QFN |
| 标准包装： | 1,000 |
| 应用： | 转换器，TFT，LCD |
| 输入电压： | 4.5 V ~ 16.5 V |
| 输出数： | 8 |
| 输出电压： | 0.5 V ~ 14.95 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x6） |
| 包装： | 带卷 (TR) |
EL5126
Absolute Maximum Ratings (T A = 25°C)
Supply Voltage between V S and GND. . . . . . . . . . . . . . . . . . . .+18V
Supply Voltage between V SD and GND . . . . . . . . . . . . . . . . . . .+7V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T J = T C = T A
Electrical Specifications
V S = 18V, V SD = 5V, V REFH = 13V, V REFL = 2V, R L = 1.5k Ω and C L = 200pF to 0V, T A = +25°C Unless
Otherwise Specified.
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
SUPPLY
I S
I SD
Supply Current
Digital Supply Current
No load
7.6
1.9
9
3.2
mA
mA
ANALOG
V OL
Output Swing Low
Sinking 5mA
50
150
mV
V OH
I SC
PSRR
t D
V AC
Output Swing High
Short Circuit Current
Power Supply Rejection Ratio
Program to Out Delay
Accuracy
Sourcing 5mA
R L = 10 Ω
V S + is moved from 14V to 16V
14.85
150
45
14.95
240
60
4
20
V
mA
dB
ms
mV
V DROOP
R INH
REG
Droop Voltage
Input Resistance @ V REFH , V REFL
Load Regulation
F CLOCK = 25kHz
I OUT = 5mA step
1
32
0.5
2
1.5
mV/ms
k Ω
mV/mA
DIGITAL
V IH
Logic 1 Input Voltage
V SD -
V
20%
V IL
Logic 0 Input Voltage
20%*
V
V SD
F CLK
R SDIN
t S
t H
t R
t F
Clock Frequency
S DIN Input Resistance
Setup Time
Hold Time
Rise Time
Fall Time
1
40
40
20
20
400
kHz
G Ω
ns
ns
ns
ns
2
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