参数资料
| 型号： | EL7556DCMZ-T13 |
| 厂商： | Intersil |
| 文件页数： | 11/11页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 28SOIC |
| 标准包装： | 1,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 3.8 V |
| 输入电压： | 5V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 28-SOIC W |
EL7556D
maintain a constant gain ratio. The recommended ratio of
C OSC to C SLOPE is 1.5:1
Temperature Sensor
An internal temperature sensor continuously monitors die
temperature. In the event that die temperature exceeds the
thermal trip-point, the OT pin will output a logic 0. The upper
and lower trip points are set to 135°C and 100°C,
respectively. To enable thermal shutdown this pin should be
tied directly to OUTEN. Use of this feature is recommended
during normal operation
Power Good and Power On Reset
During power up the output regulator will be disabled until
V IN reaches a value of approximately 4.0V. Approximately
500mV of hysteresis is present to eliminate noise induced
oscillations.
Additional information can be found in Application Note #8
(Measuring the Thermal Resistance of Power Surface-
Mount Packages).
If the thermal shutdown pin is connected to OUTEN the IC
will enter thermal shutdown when the maximum junction
temperature is reached. For a thermal shutdown of 135oC
and power dissipation of 2.2W the ambient temperature is
limited to a maximum value of 67oC (typical). The ambient
temperature range can be extended with the application of
air flow. For example, the addition of 100LFM reduces the
thermal resistance by approximately 15% and can extend
the operating ambient to 77oC (typical). Since the thermal
performance of the IC is heavily dependent on the board
layout, the system designer should exercise care during the
design phase to ensure that the IC will operate under the
worst-case environmental conditions.
Under-voltage and over-voltage conditions on the regulator
output are detected through an internal window comparator.
A logic 1 on the PWRGD output indicates that regulated
output voltage is within ±10% of the nominally programmed
output voltage. Although small, the typical values of the
PWRGD threshold will vary with changes to external
feedback (and resultant loop gain) of the system. This
dependence is shown in the typical performance curves.
Thermal Management
The EL7556D utilizes “fused lead” packaging technology in
conjunction with the system board layout to achieve a lower
thermal resistance than typically found in standard 28-pin
SO packages. By fusing (or connecting) multiple external
leads to the die substrate within the package, a very
conductive heat path to the outside of the package is
created. This conductive heat path MUST then be connected
to a heat sinking area on the PCB in order to dissipate heat
out and away from the device. The conductive paths for the
EL7556D package are the fused leads: # 7, 9, 10, 11, 12, 18,
and 19. If a sufficient amount of PCB metal area is
connected to the fused package leads, a junction-to-ambient
thermal resistance of approximately 31°C/W can be
achieved (compared to 78°C/W for a standard SO28
package). The general relationship between PCB heat-
sinking metal area and the thermal resistance for this
package is shown in the Performance Curves section of this
data sheet. It can be readily seen that the thermal resistance
for this package approaches an asymptotic value of
approximately 31°C/W without any airflow.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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