参数资料
型号: EL7562CUZ
厂商: Intersil
文件页数: 3/9页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2A 16QSOP
标准包装: 97
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1 V ~ 3.8 V
输入电压: 3.5 V ~ 5 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 2A
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 16-QSOP
产品目录页面: 1242 (CN2011-ZH PDF)
Closed-Loop AC Electrical Specifications
V S = V IN = 5V, T A = T J = 25°C, C OSC = 270pF, unless otherwise specified.
PARAMETER
F OSC
DESCRIPTION
Oscillator Initial Accuracy
CONDITIONS
MIN
493
TYP
580
MAX
667
UNIT
kHz
t SYNC
M SS
t BRM
t LEB
D MAX
Minimum Oscillator Sync Width
Soft-start Slope
FET Break Before Make Delay
High Side FET Minimum On Time
Maximum Duty Cycle
25
0.5
15
150
95
ns
V/ms
ns
ns
%
Pin Descriptions
PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN NAME
SGND
COSC
VDD
PGND
PGND
VIN
VIN
EN
PGND
VHI
LX
LX
VDRV
FB
VREF
PGND
PIN FUNCTION
Control circuit negative supply
Oscillator timing capacitor; F OSC can be approximated by: F OSC (kHz) = 0.1843/C OSC , C OSC in μF
Control circuit positive supply
Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET
Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET
Power supply input of the regulator; connected to the drain of the high-side NMOS power FET
Power supply input of the regulator; connected to the drain of the high-side NMOS power FET
Chip enable, active high; a 2μA internal pull-up current enables the device if the pin is left open
Ground return of the regulator
Positive supply of the high-side driver
Inductor drive pin; high current digital output whose average voltage equals the regulator output voltage
Inductor drive pin; high current digital output whose average voltage equals the regulator output voltage
Positive supply of the low-side driver and input voltage for the high-side boot strap
Voltage feedback input; connected to an external resistor divider between V OUT and GND; a 125nA pull-up current
forces V OUT to V S in the event that FB is floating
Bandgap reference bypass capacitor; typically 0.1μF to GND
Ground return of the regulator
3
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