参数资料
型号: EM260-RTY
厂商: Silicon Laboratories Inc
文件页数: 23/50页
文件大小: 0K
描述: IC ZIGBEE SYSTEM-ON-CHIP 40-QFN
标准包装: 429
频率: 2.4GHz
数据传输率 - 最大: 250kbps
调制或协议: 802.15.4
应用: ZigBee?
功率 - 输出: -32dBm ~ 3dBm
灵敏度: -97dBm
电源电压: 2.1 V ~ 3.6 V
电流 - 接收: 30mA
电流 - 传输: 34mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 40-VFQFN 裸露焊盘
包装: 托盘
其它名称: 636-1003
EM260
5.2.1
Command Section
The Host begins the transaction by asserting the Slave Select and then sending a command to the EM260. This
command can be of any length from 2 to 136 bytes and must not begin with 0xFF . During the Command
section, the EM260 will respond with only 0xFF . The Host should ignore data on MISO during the Command
section. Once the Host has completed transmission of the entire message, the transaction moves to the Wait
section.
5.2.2
Wait Section
The Wait section is a period of time during which the EM260 may be processing the command or performing
other operations. Note that this section can be any length of time up to 300 milliseconds. Because of the
variable size of the Wait section, an interrupt-driven or polling-driven method is suggested for clocking the SPI
as opposed to a DMA method. Since the EM260 can require up to 300 milliseconds to respond, as long as the
Host keeps Slave Select active, the Host can perform other tasks while waiting for a Response.
To determine when a Response is ready, use one of two methods:
Clock the SPI until the EM260 transmits a byte other than 0xFF .
Interrupt on the falling edge of nHOST_INT.
The first method, clocking the SPI, is recommended due to simplicity in implementing. During the Wait
section, the EM260 will transmit only 0xFF and will ignore all incoming data until the Response is ready. When
the EM260 transmits a byte other than 0xFF , the transaction has officially moved into the Response section.
Therefore, the Host can poll for a Response by continuing to clock the SPI by transmitting 0xFF and waiting for
the EM260 to transmit a byte other than 0xFF . The EM260 will also indicate that a Response is ready by
asserting the nHOST_INT signal. The falling edge of nHOST_INT is the indication that a Response is ready. Once
the nHOST_INT signal asserts, nHOST_INT will return to idle after the Host begins to clock data.
5.2.3
Response Section
When the EM260 transmits a byte other than 0xFF , the transaction has officially moved into the Response
section. The data format is the same format used in the Command section. The response can be of any length
from 2 to 136 bytes and will not begin with 0xFF . Depending on the actual response, the length of the
response is known from the first or second byte and this length should be used by the Host to clock out exactly
the correct number of bytes. Once all bytes have been clocked, it is allowable for the Host to deassert chip
select. Since the Host is in control of clocking the SPI, there are no ACKs or similar signals needed back from
the Host because the EM260 will assume the Host could accept the bytes being clocked on the SPI. After every
transaction, the Host must hold the Slave Select high for a minimum of 1ms. This timing requirement is called
the inter-command spacing and is necessary to allow the EM260 to process a command and become ready to
accept a new command.
5.2.4
Asynchronous Signaling
When the EM260 has data to send to the Host, it will assert the nHOST_INT signal. The nHOST_INT signal is
designed to be an edge-triggered signal as opposed to a level-triggered signal; therefore, the falling edge of
nHOST_INT is the true indicator of data availability. The Host then has the responsibility to initiate a
transaction to ask the EM260 for its output. The Host should initiate this transaction as soon as possible to
prevent possible backup of data in the EM260. The EM260 will deassert the nHOST_INT signal after receiving a
byte on the SPI. Due to inherent latency in the EM260, the timing of when the nHOST_INT signal returns to idle
can vary between transactions. nHOST_INT will always return to idle for a minimum of 10us before asserting
again. If the EM260 has more output available after the transaction has completed, the nHOST_INT signal will
assert again after Slave Select is deasserted and the Host must make another request.
Page 23
120-0260-000M Rev 1.1
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