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| 型号： | EM6617SO28A |
| 英文描述： | Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: 0°C to 70°C; Package: 8-EPSOIC T&R |
| 中文描述： | 微控制器 |
| 文件页数： | 4/67页 |
| 文件大小： | 824K |
| 代理商： | EM6617SO28A |
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EM6617
03/02 REV. C/442
Copyright
2002, EM Microelectronic-Marin SA
12
www.emmicroelectronic.com
6. Oscillator and Prescaler
6.1 Oscillator
A built-in crystal oscillator generates the system operating clock for the CPU and peripheral blocks, from an
externally connected crystal (typically 32.768kHz or 128KHz depending of the metal opt. on table 19.1.6). The
oscillator circuit is supplied by the regulated voltage, Vreg. In sleep mode the oscillator is stopped.
EM’s special design techniques guarantee the low current consumption of this oscillator. The external
impedance between the oscillator pads must be greater than 10MOhm. Connection of any other components to
the two oscillator pads must be confirmed by EM Microelectronic-Marin SA.
6.2 Prescaler
The prescaler consists of fifteen elements divider chain which delivers clock signals for the peripheral circuits
such as timer/counter, buzzer, LCD voltage multiplier, debouncer and edge detectors, as well as generating
prescaler interrupts. The input to the prescaler is the system clock signal. Power on initializes to Hex(0001).
Table 6.2.1 Prescaler Clock Name Definition
Function
Name
32 KHz Xtal
Function
Name
32 KHz Xtal
System clock
Ck[16]
32768 Hz
System clock / 256
Ck[8]
128 Hz
System clock / 2
Ck[15]
16384 Hz
System clock / 512
Ck[7]
64 Hz
System clock / 4
Ck[14]
8192 Hz
System clock / 1024
Ck[6]
32 Hz
System clock / 8
Ck[13]
4096 Hz
System clock / 2048
Ck[5]
16 Hz
System clock/ 16
Ck[12]
2048 Hz
System clock / 4096
Ck[4]
8 Hz
System clock / 32
Ck[11]
1024 Hz
System clock / 8192
Ck[3]
4 Hz
System clock / 64
Ck[10]
512 Hz
System clock / 16384
Ck[2]
2 Hz
System clock / 128
ck [9]
256 Hz
System clock / 32768
Ck[1]
1 Hz
Table 6.2.2 Control of Prescaler Register RegPresc
Bit
Name
Reset
R/W
Description
3
PWMOn
0
R/W
see 10 bit counter
2
ResPresc
0
R/W
Write Reset prescaler
1 -> Resets the divider chain
from Ck[14] down to
Ck[2], sets Ck[1].
0 -> No action.
The Read value is always '0'
1
PrIntSel
0
R/W
Interrupt select.
0 -> Interrupt from Ck[4]
1 -> Interrupt from Ck[6]
0
DebSel
0
R/W
Debouncer clock select.
0 -> Debouncer with Ck[8]
1 -> Debouncer with Ck[11]
or Ck[14]
With DebSel = 1 one may choose either the Ck[11] or Ck[14] debouncer frequency by selecting the
corresponding metal mask option. Relative to 32kHz the corresponding max. debouncer times are then 2 ms or
0.25 ms. For the metal mask selection refer to chapter 19.1.4.
Switching the PrIntSel may generate an interrupt request. Avoid it with MaskIRQ32/8 = 0 selection during the
switching operation.
The prescaler contains 2 interrupt sources:
- IRQ32/8 ; this is Ck[6] or Ck[4] positive edge interrupt, the selection is depending on bit PrIntSel.
- IRQHz1 ; this is Ck[1] positive edge interrupt
There is no interrupt generation on reset.
The first IRQHz1 Interrupt occurs 1 sec (32kHz) after reset.
Figure 11. Prescaler Frequency Timing
System Clock
Ck[16]
Ck[15]
Ck[14]
Horizontal Scale Change
Ck[2]
Ck[1]
First positive edge of 1 Hz clock is 1s after
the falling reset edge
Prescaler Reset
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