参数资料
型号: EP1K30TI144-2N
厂商: Altera
文件页数: 44/86页
文件大小: 0K
描述: IC ACEX 1K FPGA 30K 144-TQFP
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 180
系列: ACEX-1K®
LAB/CLB数: 216
逻辑元件/单元数: 1728
RAM 位总计: 24576
输入/输出数: 102
门数: 119000
电源电压: 2.375 V ~ 2.625 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 144-LQFP
供应商设备封装: 144-TQFP(20x20)
其它名称: 544-1840
EP1K30TI144-2N-ND
Altera Corporation
49
ACEX 1K Programmable Logic Device Family Data Sheet
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Figure 22 shows the required relationship between VCCIO and VCCINT to
satisfy 3.3-V PCI compliance.
Figure 22. Relationship between VCCIO & VCCINT for 3.3-V PCI Compliance
Figure 23 shows the typical output drive characteristics of ACEX 1K
devices with 3.3-V and 2.5-V VCCIO. The output driver is compliant to the
3.3-V PCI Local Bus Specification, Revision 2.2 (when VCCIO pins are
connected to 3.3 V). ACEX 1K devices with a -1 speed grade also comply
with the drive strength requirements of the PCI Local Bus Specification,
Revision 2.2
(when VCCINT pins are powered with a minimum supply of
2.375 V, and VCCIO pins are connected to 3.3 V). Therefore, these devices
can be used in open 5.0-V PCI systems.
3.0
3.1
3.3
VCCIO
IO
3.6
2.3
2.5
2.7
VCCINT
II
(V)
(V)
PCI-Compliant Region
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