参数资料
型号: EP2AGX125DF25I5
厂商: Altera
文件页数: 85/90页
文件大小: 0K
描述: IC ARRIA II GX FPGA 125K 572FBGA
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 5
系列: Arria II GX
LAB/CLB数: 4964
逻辑元件/单元数: 118143
RAM 位总计: 8315904
输入/输出数: 260
电源电压: 0.87 V ~ 0.93 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 572-FBGA
供应商设备封装: 572-FBGA
1–78
Chapter 1: Device Datasheet for Arria II Devices
Document Revision History
December 2013
Altera Corporation
December 2010
4.0
Added Arria II GZ information.
Added Table 1–61 with Arria II GX information.
Updated Table 1–1, Table 1–2, Table 1–5, Table 1–6, Table 1–7, Table 1–11, Table 1–35,
Table 1–37, Table 1–40, Table 1–42, Table 1–44, Table 1–45, Table 1–57, Table 1–61, and
Table 1–63.
Updated Figure 1–5.
Updated for the Quartus II version 10.0 release.
Updated the first paragraph for searchability.
Minor text edits.
July 2010
3.0
Updated Table 1–1, Table 1–4, Table 1–16, Table 1–19, Table 1–21, Table 1–23,
Table 1–25, Table 1–26, Table 1–30, and Table 1–35
Added Table 1–27 and Table 1–29.
Added I3 speed grade information to Table 1–19, Table 1–21, Table 1–22, Table 1–24,
Table 1–25, Table 1–30, Table 1–32, Table 1–33, Table 1–34, and Table 1–35.
Updated the “Operating Conditions” section.
Removed “Preliminary” from Table 1–19, Table 1–21, Table 1–22, Table 1–23,
Table 1–24, Table 1–25, Table 1–26, Table 1–28, Table 1–30, Table 1–32, Table 1–33,
Table 1–34, and Figure 1–4.
Minor text edits.
March 2010
2.3
Updated for the Quartus II version 9.1 SP2 release:
Updated Table 1–3, Table 1–7, Table 1–19, Table 1–21, Table 1–22, Table 1–24,
Table 1–25 and Table 1–33.
Updated “Recommended Operating Conditions” section.
Minor text edits.
February 2010
2.2
Updated Table 1–19.
February 2010
2.1
Updated for Arria II GX v9.1 SP1 release:
Updated Table 1–19, Table 1–23, Table 1–28, Table 1–30, and Table 1–33.
Added Figure 1–5.
Minor text edits.
November 2009
2.0
Updated for Arria II GX v9.1 release:
Updated Table 1–1, Table 1–4, Table 1–13, Table 1–14, Table 1–19, Table 1–15,
Table 1–22, Table 1–24, and Table 1–28.
Added Table 1–6 and Table 1–33.
Added “Bus Hold” on page 1–5.
Added “IOE Programmable Delay” section.
Minor text edit.
June 2009
1.2
Updated Table 1–1, Table 1–3, Table 1–7, Table 1–8, Table 1–18, Table 1–23, Table 1–25,
Table 1–26, Table 1–29, Table 1–30, Table 1–31, Table 1–32, and Table 1–33.
Added Table 1–32.
Updated Equation 1–1.
March 2009
1.1
Added “I/O Timing” section.
February 2009
1.0
Initial release.
Table 1–69. Document Revision History (Part 2 of 2)
Date
Version
Changes
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EP2AGX125DF25I5N 功能描述:FPGA - 现场可编程门阵列 FPGA - Arria II GX 4964 LABs 260 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP2AGX125EF29C4 功能描述:FPGA - 现场可编程门阵列 FPGA - Arria II GX 4964 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP2AGX125EF29C4N 功能描述:FPGA - 现场可编程门阵列 FPGA - Arria II GX 4964 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP2AGX125EF29C5 功能描述:FPGA - 现场可编程门阵列 FPGA - Arria II GX 4964 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP2AGX125EF29C5N 功能描述:FPGA - 现场可编程门阵列 FPGA - Arria II GX 4964 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256