参数资料
型号: EP4SE530H35C3
厂商: Altera
文件页数: 61/82页
文件大小: 0K
描述: IC STRATIX IV FPGA 530K 1152HBGA
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 3
系列: STRATIX® IV E
LAB/CLB数: 21248
逻辑元件/单元数: 531200
RAM 位总计: 28033024
输入/输出数: 744
电源电压: 0.87 V ~ 0.93 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 1152-BBGA 裸露焊盘
供应商设备封装: 1152-HBGA(40x40)
1–56
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Stratix IV Device Handbook
March 2014
Altera Corporation
Volume 4: Device Datasheet and Addendum
TCCS
True Differential I/O Standards
100
100
100
ps
Emulated Differential I/o
Standards
250
250
250
ps
Receiver
True Differential I/O
Standards -
fHSDRDPA (data rate)
SERDES factor J = 3 to 10 (11)
150
1600
150
1250
150
1250
Mbps
fHSDR (data rate)
SERDES factor J = 3 to 10
Mbps
SERDES factor J = 2,
Uses DDR Registers
Mbps
SERDES factor J = 1,
Uses an SDR Register
Mbps
DPA Mode
DPA run length
10000
10000
10000
UI
Soft CDR mode
Soft-CDR PPM
tolerance
300
300
300
±
PPM
Non DPA Mode
Sampling Window
300
300
300
ps
Notes to Table 1–42:
(1) When J = 3 to 10, use the serializer/deserializer (SERDES) block.
(2) When J = 1 or 2, bypass the SERDES block.
(3) Clock Boost Factor (W) is the ratio between input data rate to the input clock rate.
(4) For 820, 530, 360, and 290 density devices, the frequency is 762 MHz.
(5) The minimum specification depends on the clock source (for example, the PLL and clock pin) and the clock routing resource (global, regional, or local)
that you use. The I/O differential buffer and input register do not have a minimum toggle rate.
(6) The maximum ideal frequency is the SERDES factor (J) x the PLL maximum output frequency (fOUT) provided you can close the design timing and the
signal integrity simulation is clean.
(7) You must calculate the leftover timing margin in the receiver by performing link timing closure analysis. You must consider the board skew margin,
transmitter channel-to-channel skew, and receiver sampling margin to determine leftover timing margin.
(8) You can estimate the achievable maximum data rate for non-DPA mode by performing link timing closure analysis. You must consider the board skew
margin, transmitter delay margin, and the receiver sampling margin to determine the maximum data rate supported.
(9) This is achieved by using the LVDS and DPA clock network.
(10) If the receiver with DPA enabled and transmitter are using shared PLLs, the minimum data rate is 150 Mbps.
(11) The fMAX specification is based on the fast clock used for serial data. The interface fMAX also depends on the parallel clock domain, which is design
dependent and requires timing analysis.
(12) This only applies to DPA and soft-CDR modes.
(13) This only applies to LVDS source synchronous mode.
Table 1–42. High-Speed I/O Specifications (1), (2) (Part 3 of 3)
Symbol
Conditions
–2/–2× Speed Grade
–3 Speed Grade
–4 Speed Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
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EP4SE530H35C3ES 功能描述:IC STRATIX IV E 530K 1152-HBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:STRATIX® IV E 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA(34.55x34.55)
EP4SE530H35C3N 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV E 21248 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP4SE530H35C3NES 功能描述:IC STRATIX IV E 530K 1152-HBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:STRATIX® IV E 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA(34.55x34.55)
EP4SE530H35C4 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV E 21248 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP4SE530H35C4ES 制造商:Altera Corporation 功能描述:IC STRATIX IV E FPGA 1152HBGA 制造商:Altera Corporation 功能描述:IC FPGA 744 I/O 1152HBGA