参数资料
型号: EPCS4SI8N
厂商: Altera
文件页数: 26/40页
文件大小: 0K
描述: IC CONFIG DEVICE 4MBIT 8-SOIC
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 100
系列: EPCS
可编程类型: 系统内可编程
存储容量: 4Mb
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
产品目录页面: 604 (CN2011-ZH PDF)
其它名称: 544-1379-5
EPCS4SI8N-ND
Page 32
Programming and Configuration File Support
Serial Configuration (EPCS) Devices Datasheet
January 2014
Altera Corporation
Programming and Configuration File Support
The Quartus II software provides programming support for EPCS devices. When you
select an EPCS device, the Quartus II software automatically generates the
Programmer Object File (.pof) to program the device. The software allows you to
select the appropriate EPCS device density that most efficiently stores the
configuration data for the selected FPGA.
You can program the EPCS device in-system by an external microprocessor using the
SRunner software driver. The SRunner software driver is developed for embedded
EPCS device programming that you can customize to fit in different embedded
systems. The SRunner software driver reads .rpd files and writes to the EPCS devices.
The programming time is comparable to the Quartus II software programming time.
Because the FPGA reads the LSB of the .rpd data first during the configuration
process, the LSB of .rpd bytes must be shifted out first during the read bytes operation
and shifted in first during the write bytes operation.
1 Writing and reading the .rpd file to and from the EPCS device is different from the
other data and address bytes.
f For more information about the SRunner software driver, refer to
You can program EPCS devices using the APU with the appropriate programming
adapter, such as PLMSEPC-8, using the Quartus II software or the USB-Blaster,
EthernetBlaster, or ByteBlaster II download cable. In addition, many third-party
programmers, such as the BP Microsystems and System General programmers, offer
programming hardware that supports EPCS devices.
During the ISP of an EPCS device using the USB-Blaster, EthernetBlaster, or
ByteBlaster II download cable, the cable pulls the nCONFIG signal low to reset the
FPGA and overrides the 10-k pull-down resistor on the nCE pin of the FPGA, as
shown in Figure 2 on page 4. The download cable then uses the four interface
pins—DATA, nCS, ASDI, and DCLK—to program the EPCS device. When programming is
complete, the download cable releases the four interface pins of the EPCS device and
the nCE pin of the FPGA and pulses the nCONFIG signal to start the configuration
process.
The FPGA can program the EPCS device in-system using the JTAG interface with the
SFL. This solution allows you to indirectly program the EPCS device using the same
JTAG interface that is used to configure the FPGA.
f For more information about SFL, refer to AN 370: Using the Serial FlashLoader with the
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