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| 型号： | EPF10K200S |
| 厂商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10KE嵌入式可编程逻辑系列) |
| 中文描述： | 嵌入式可编程逻辑系列（FLEX10KE嵌入式可编程逻辑系列） |
| 文件页数： | 9/20页 |
| 文件大小： | 322K |
| 代理商： | EPF10K200S |
Altera Corporation
9
PIB 21: Implementing Logic with the Embedded Array in FLEX 10K Devices
The EAB, configured as a LUT, can implement a FIR filter by performing
the coefficient multiplication for all taps. The multiplication for all taps is
spread across several EABs, with each EAB calculating the partial
products for 1 bit of each tap. For example, EAB 0 calculates the partial
products for bit 0 of each tap. Then, the EAB outputs are summed by an
adder in the logic array. The FLEX 10K carry chain is designed to
implement fast, compact adders.
The required precision on the output and the number of taps in the FIR
filter determine the EAB configuration used to implement the FIR filter.
For 8-bit precision on the output, each EAB is configured with 8 outputs.
The number of taps in the FIR filter determines the number of inputs
required for each EAB; if the coefficients are symmetric, only half the
number of inputs are required because the filter can sum the taps with the
same coefficients before multiplying. Thus, using EABs with 8 inputs
implements a FIR filter with a maximum of 16 taps.
Implementing a FIR filter with an embedded array can be more efficient
than implementing a FIR filter with logic elements (LEs). An EAB has up
to 8 inputs and 8 outputs, and could implement a 16-tap FIR filter without
using complex logic to compute the coefficient multiplication. An LE has
only 4 inputs, and would require multiple levels of logic to implement a
FIR filter that required more than 8 taps. The EAB can be reconfigured
on-the-fly, allowing the coefficients used in the FIR filter to be changed
without disturbing the operation of the rest of the device.
Two-Dimensional Convolver
The embedded array can efficiently implement two-dimensional
convolvers, which are used to process video images. For example, the
convolver sharpens the edges of a picture for output in a technique called
edge enhancement. The convolver processes the video information in
small pieces, such as a 3
×
3 matrix, and then multiplies each pixel in the
matrix by a constant coefficient. Because the coefficient values are usually
symmetric, the number of multipliers needed is reduced by summing the
multiplicands with the same coefficient before multiplying. The new
value of the center pixel is the sum of all the matrix multiplications.
Figure 6
shows a block diagram of a two-dimensional convolver.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF10K200SBC356-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200SBC356-1X | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200SBC356-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200SBC356-2X | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200SBC356-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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