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参数资料
| 型号： | EPF6016A |
| 厂商： | Altera Corporation |
| 英文描述： | Programmable Logic Device Family(FLEX6000可编程逻辑系列器件) |
| 中文描述： | 可编程逻辑器件系列（FLEX6000可编程逻辑系列器件） |
| 文件页数： | 2/59页 |
| 文件大小： | 1051K |
| 代理商： | EPF6016A |
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2
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
...and More
Features
I
Powerful I/O pins
–
Individual tri-state output enable control for each pin
–
Programmable output slew-rate control to reduce switching
noise
–
Fast path from register to I/O pin for fast clock-to-output time
Flexible interconnect
–
FastTrack
Interconnect continuous routing structure for fast,
predictable interconnect delays
–
Dedicated carry chain that implements arithmetic functions such
as fast adders, counters, and comparators (automatically used by
software tools and megafunctions)
–
Dedicated cascade chain that implements high-speed, high-fan-
in logic functions (automatically used by software tools and
megafunctions)
–
Tri-state emulation that implements internal tri-state networks
–
Four low-skew global paths for clock, clear, preset, or logic
signals
Software design support and automatic place-and-route provided by
Altera’s MAX+PLUS
II development system for Windows-based
PCs and Sun SPARCstation, HP 9000 Series 700/800, and IBM RISC
System/6000 workstations, and the Quartus
TM
development system
for Windows-based PCs and Sun SPARCstation and HP 9000
Series 700 workstations
Flexible package options
–
Available in a variety of packages with 100 to 256 pins, including
the innovative FineLine BGA
TM
packages (see
Table 2
)
–
SameFrame
TM
pin-compatibility (with other FLEX
6000 devices)
across device densities and pin counts
–
Thin quad flat pack (TQFP), plastic quad flat pack (PQFP), and
ball-grid array (BGA) packages (see
Table 2
)
–
Footprint- and pin-compatibility with other FLEX 6000 devices
in the same package
Additional design entry and simulation support provided by
EDIF 2 0 0 and 3 0 0 netlist files, the library of parameterized modules
(LPM), Verilog HDL, VHDL, DesignWare components, and other
interfaces to popular EDA tools from manufacturers such as
Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys,
Synplicity, VeriBest, and Viewlogic
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I
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF6016AFC100-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 6000 132 LABs 81 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF6016AFC100-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 6000 132 LABs 81 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF6016AFC100-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 6000 132 LABs 81 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF6016AFC100-3N | 制造商:Altera Corporation 功能描述: |
| EPF6016AFC256-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 6000 132 LABs 171 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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