参数资料
| 型号： | EPF8636AQC160-3 |
| 厂商： | Altera |
| 文件页数： | 59/62页 |
| 文件大小： | 0K |
| 描述： | IC FLEX 8000A FPGA 6K 160-PQFP |
| 产品培训模块： | Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 72 |
| 系列： | FLEX 8000 |
| LAB/CLB数： | 63 |
| 逻辑元件/单元数： | 504 |
| 输入/输出数： | 118 |
| 门数： | 6000 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 160-BQFP |
| 供应商设备封装： | 160-PQFP（28x28） |
| 其它名称： | 544-2261 |
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62
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
Perform a complete thermal analysis before committing a design to this device package. See Application Note 74
(Evaluating Power for Altera Devices) for more information.
(2)
This pin is a dedicated pin and is not available as a user I/O pin.
(3)
SDOUT
will drive out during configuration. After configuration, it may be used as a user I/O pin. By default, the
MAX+PLUS II software will not use SDOUT as a user I/O pin; the user can override the MAX+PLUS II software and
use SDOUT as a user I/O pin.
(4)
If the device is not configured to use the JTAG BST circuitry, this pin is available as a user I/O pin.
(5)
JTAG pins are available for EPF8636A devices only. These pins are dedicated user I/O pins.
(6)
If this pin is used as an input in user mode, ensure that it does not toggle before or during configuration.
(7)
TRST
is a dedicated input pin for JTAG use. This pin must be grounded if JTAG BST is not used.
(8)
Pin 52 is a VCC pin on EPF8452A devices only.
(9)
The user I/O pin count includes dedicated input pins and all I/O pins.
(10) Unused dedicated inputs should be tied to ground on the board.
(11) SDOUT does not exist in the EPF8636GC192 device.
(12) These pins are no connect (N.C.) pins for EPF8636A devices only. They are user I/O pins in EPF8820A devices.
(13) EPF8636A devices have 132 user I/O pins; EPF8820A devices have 148 user I/O pins.
(14) For EPF81500A devices, these pins are dedicated JTAG pins and are not available as user I/O pins. If JTAG BST is
not used, TDI, TCK, TMS, and TRST should be tied to GND.
Revision
History
The information contained in the FLEX 8000 Programmable Logic Device
Family Data Sheet version 11.1 supersedes information published in
previous versions. The FLEX 8000 Programmable Logic Device Family Data
Sheet version 11.1 contains the following change: minor textual updates.
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相关代理商/技术参数 |
参数描述 |
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| EPF8636AQC160-3N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 63 LABs 118 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF8636AQC160-4 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 63 LABs 118 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF8636AQC160-4N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 63 LABs 118 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF8636AQC208-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 63 LABs 136 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF8636AQC208-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 63 LABs 136 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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