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参数资料
| 型号： | EPL43102 |
| 英文描述： | Graphic STN LCD Drivers with Built-in RAM |
| 中文描述： | 图形STN液晶显示器驱动器，内置内存 |
| 文件页数： | 28/64页 |
| 文件大小： | 280K |
| 代理商： | EPL43102 |
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43 COM / 102 SEG LCD DRIVER
The information in this document is subject to change without notice.
29
/DOF pin description
The pin is used to control blinking LCD display.
M/S= “H”
M/S=”L”
Instruction
/DOF (Output) /DOF (Input) =”H” /DOF (Input) =”L”
Display “ON”
“H”
LCD On
LCD Off
Display “OFF”
“L”
LCD Off
When the “Power Save” Instruction is activating, the /DOF pin is set to low level.
Display timing generator circuit
This circuit generates some signals to be used to display LCD. When using in
master/slave mode (multi-chip), some pins must be connected each other. That’s due to
synchronization output. The display clock (CL) generated by the oscillation clock,
generates a clock to the line counter and a latch signal to the display data latch. The line
address of the on-chip RAM is generated in synchronization with the display clock (CL),
and the 102-bit display data is latched by the display data latch circuit in synchronization
with the display clock. The display data which is read to the LCD driver is completely
independent of the access to the display data RAM from the microprocessor.
The display clock generates an LCD frame reversal signal (FR) which enables the LCD
driver to make an AC drive waveform, and also generates an internal common timing
signal and start signal to the common driver.. When this EPL43102 is used for a
multi-chip, the slave chip must receive the FR, CL, /DOF signals from the master.
Operation Mode
FR
CL
/DOF
FRS
OSC
Internal oscillator is enable(CLS=”H”) Output Output Output Output Open
Master
(M/S=”H”)
Internal oscillator is disable (CLS=”L”) Output Output Output Output Input
Input
Hi-Z
Open
Slave (M/S=”L”)
Internal oscillator is disable
(CLS =”L” or “H”)
Input
Hi-Z
Open
Note: Open means “leave the pin open”
Oscillator frequency
The EPL43102 contains a RC oscillator. The frame frequency (fFM) is derived from the
RC circuit’s oscillation frequency (fOSC) by driving it an appropriate value. The
relationship between the oscillation frequency (fOSC), display clock frequency (fCL) and
the frame frequency (fFM) is shown below.
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