参数资料
型号: EPM7032BTI44-5
厂商: Altera
文件页数: 4/66页
文件大小: 0K
描述: IC MAX 7000 CPLD 32 44-TQFP
标准包装: 480
系列: MAX® 7000B
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 5.0ns
电压电源 - 内部: 2.375 V ~ 2.625 V
逻辑元件/逻辑块数目: 2
宏单元数: 32
门数: 600
输入/输出数: 36
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 44-TQFP
供应商设备封装: 44-TQFP(10x10)
包装: 托盘
12
Altera Corporation
MAX 7000B Programmable Logic Device Data Sheet
Figure 5. MAX 7000B PIA Routing
While the routing delays of channel-based routing schemes in masked or
field-programmable gate arrays (FPGAs) are cumulative, variable, and
path-dependent, the MAX 7000B PIA has a predictable delay. The PIA
makes a design’s timing performance easy to predict.
I/O Control Blocks
The I/O control block allows each I/O pin to be individually configured
for input, output, or bidirectional operation. All I/O pins have a tri-state
buffer that is individually controlled by one of the global output enable
signals or directly connected to ground or VCC. Figure 6 shows the I/O
control block for MAX 7000B devices. The I/O control block has
six or ten global output enable signals that are driven by the true or
complement of two output enable signals, a subset of the I/O pins, or a
subset of the I/O macrocells.
To LAB
PIA Signals
相关PDF资料
PDF描述
NDL1215SC CONV DC/DC 2W 12VIN 15VOUT SIP
VI-B01-CY-F3 CONVERTER MOD DC/DC 12V 50W
ECC08DCSD CONN EDGECARD 16POS DIP .100 SLD
LC51024VG-10F676I IC XPLD 1024MC 10NS 676FPBGA
ABC31DRYN-S734 CONN EDGECARD 62POS DIP .100 SLD
相关代理商/技术参数
参数描述
EPM7032BUC49-3 制造商:Altera Corporation 功能描述:IC MAX
EPM7032BUC49-3N 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX 7000 32 Macro 41 IOs RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
EPM7032BUC49-5 制造商:Altera Corporation 功能描述:CPLD MAX 7000B Family 600 Gates 32 Macro Cells 212.8MHz 2.5V 49-Pin UFBGA 制造商:Altera Corporation 功能描述:IC MAX
EPM7032BUC49-7 制造商:Altera Corporation 功能描述:IC MAX
EPM7032JC44-10 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC