参数资料
型号: EPM7064AETI44-7N
厂商: Altera
文件页数: 6/64页
文件大小: 0K
描述: IC MAX 7000 CPLD 64 44-TQFP
产品变化通告: Bond Wire Change 4/Sept/2008
标准包装: 480
系列: MAX® 7000A
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 7.5ns
电压电源 - 内部: 3 V ~ 3.6 V
逻辑元件/逻辑块数目: 4
宏单元数: 64
门数: 1250
输入/输出数: 36
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 44-TQFP
供应商设备封装: 44-TQFP(10x10)
包装: 托盘
产品目录页面: 604 (CN2011-ZH PDF)
其它名称: 544-2011
EPM7064AETI44-7N-ND
14
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Figure 6. I/O Control Block of MAX 7000A Devices
When the tri-state buffer control is connected to ground, the output is
tri-stated (high impedance) and the I/O pin can be used as a dedicated
input. When the tri-state buffer control is connected to VCC, the output is
enabled.
The MAX 7000A architecture provides dual I/O feedback, in which
macrocell and pin feedbacks are independent. When an I/O pin is
configured as an input, the associated macrocell can be used for buried
logic.
From
Macrocell
Fast Input to
Macrocell
Register
Slew-Rate Control
To PIA
To Other I/O Pins
6 or 10 Global
Output Enable Signals (1)
PIA
VCC
Open-Drain Output
OE Select Multiplexer
GND
Note:
(1)
EPM7032AE, EPM7064AE, EPM7128A, EPM7128AE, EPM7256A, and EPM7256AE devices have six output enable
signals. EPM7512AE devices have 10 output enable signals.
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