参数资料
型号: EPM7256AETC144-7N
厂商: Altera
文件页数: 19/64页
文件大小: 0K
描述: IC MAX 7000 CPLD 256 144-TQFP
产品变化通告: Bond Wire Change 4/Sept/2008
标准包装: 180
系列: MAX® 7000A
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 7.5ns
电压电源 - 内部: 3 V ~ 3.6 V
逻辑元件/逻辑块数目: 16
宏单元数: 256
门数: 5000
输入/输出数: 120
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-TQFP(20x20)
包装: 托盘
其它名称: 544-2354
26
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Power
Sequencing &
Hot-Socketing
Because MAX 7000A devices can be used in a mixed-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. The VCCIO and VCCINT power planes can be powered in any
order.
Signals can be driven into MAX 7000AE devices before and during power-
up (and power-down) without damaging the device. Additionally,
MAX 7000AE devices do not drive out during power-up. Once operating
conditions are reached, MAX 7000AE devices operate as specified by the
user.
MAX 7000AE device I/O pins will not source or sink more than 300 A of
DC current during power-up. All pins can be driven up to 5.75 V during
hot-socketing, except the OE1 and GLCRn pins. The OE1 and GLCRn pins
can be driven up to 3.6 V during hot-socketing. After VCCINT and VCCIO
reach the recommended operating conditions, these two pins are 5.0-V
tolerant.
EPM7128A and EPM7256A devices do not support hot-socketing and may
drive out during power-up.
Design Security
All MAX 7000A devices contain a programmable security bit that controls
access to the data programmed into the device. When this bit is
programmed, a design implemented in the device cannot be copied or
retrieved. This feature provides a high level of design security because
programmed data within EEPROM cells is invisible. The security bit that
controls this function, as well as all other programmed data, is reset only
when the device is reprogrammed.
Generic Testing
MAX 7000A devices are fully tested. Complete testing of each
programmable EEPROM bit and all internal logic elements ensures 100%
programming yield. AC test measurements are taken under conditions
equivalent to those shown in Figure 9. Test patterns can be used and then
erased during early stages of the production flow.
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