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| 型号： | EPM9560RC208-15 |
| 文件页数： | 13/42页 |
| 文件大小： | 489K |
| 代理商： | EPM9560RC208-15 |
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Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
The MAX+PLUS II software can use text- or waveform-format test vectors
created with the MAX+PLUS II Text Editor or Waveform Editor to test a
programmed device. For added design verification, designers can
perform functional testing to compare the functional behavior of a
MAX 9000 device with the results of simulation.
Data I/O, BP Microsystems, and other programming hardware
manufacturers also provide programming support for Altera devices.
f For more information, see Programming Hardware Manufacturers.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
MAX 9000 devices support JTAG BST circuitry as specified by IEEE Std.
1149.1-1990. Table 7 describes the JTAG instructions supported by the
MAX 9000 family. The pin-out tables starting on page 35 show the
location of the JTAG control pins for each device. If the JTAG interface is
not required, the JTAG pins are available as user I/O pins.
Table 7. MAX 9000 JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a test
pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation.
IDCODE
Selects the IDCODE register and places it between TDI and TDO, allowing the IDCODE
to be shifted out of TDO. Supported by the EPM9320A, EPM9400, EPM9480, and
EPM9560A devices only.
UESCODE
Selects the user electronic signature (UESCODE) register and allows the UESCODE to
be shifted out of TDO serially. This instruction is supported by MAX 9000A devices only.
ISP Instructions
These instructions are used when programming MAX 9000 devices via the JTAG ports
with the BitBlaster or ByteBlasterMV download cable, or using a Jam File (.jam), Jam
Byte-Code File (.jbc), or Serial Vector Format (.svf) File via an embedded processor or
test equipment.
相关PDF资料 |
PDF描述 |
|---|---|
| EPM9560RC208-20 | |
| EPM9560RC240-15 | |
| EPM9560RC240-20 | |
| EPM9560RC304-15 | |
| EPM9560RI208-15 | |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EPM9560RC208-20 | 制造商:Altera Corporation 功能描述:IC MAX |
| EPM9560RC240-15 | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX 9000 560 Macro 191 IOs RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| EPM9560RC240-15YY | 制造商:Altera Corporation 功能描述:CPLD MAX 9000 Family 12K Gates 560 Macro Cells 117.6MHz CMOS Technology 5V 240-Pin RQFP 制造商:Altera Corporation 功能描述:CPLD MAX 9000 Family 12K Gates 560 Macro Cells 117.6MHz 5V 240-Pin RQFP |
| EPM9560RC240-20 | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX 9000 560 Macro 191 IOs RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| EPM9560RC304-15 | 制造商:Altera Corporation 功能描述:IC MAX |
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